| 1995 | Asynchronous 2-D discrete cosine transform core processor. | Bret Stott, Dave Johnson, Venkatesh Akella |
| 1995 | Low power data format converter design using semi-static register allocation. | Kala Srivatsan, Chaitali Chakrabarti, Lori Lucke |
| 1995 | A floating point radix 2 shared division/square root chip. | Hosahalli R. Srinivas, Keshab K. Parhi |
| 1995 | A superscalar RISC processor with pseudo vector processing feature. | Kotaro Shimamura, Shigeya Tanaka, Tetsuya Shimomura, Takashi Hotta, Eiki Kamada, Hideo Sawamoto, Teruhisa Shimizu, Kisaburo Nakazawa |
| 1995 | A coprocessor for accurate and reliable numerical computations. | Michael J. Schulte, Earl E. Swartzlander Jr. |
| 1995 | Rational clocking [digital systems design]. | Luis F. G. Sarmenta, Gill A. Pratt, Stephen A. Ward |
| 1995 | Performance monitoring on the PowerPC 604 microprocessor. | Charles P. Roth, Frank E. Levine, Edward H. Welbon |
| 1995 | Precise exception handling for a self-timed processor. | William F. Richardson, Erik Brunvand |
| 1995 | Testing-what's missing? An incomplete list of challenges. | Sudhakar M. Reddy |
| 1995 | Distributed automatic test pattern generation with a parallel FAN algorithm. | Stefan Radtke, Jens Bargfrede, Walter Anheier |
| 1995 | Analysis of conditional resource sharing using a guard-based control representation. | Ivan P. Radivojevic, Forrest Brewer |
| 1995 | Test generation for multiple state-table faults in finite-state machines. | Irith Pomeranz, Sudhakar M. Reddy |
| 1995 | Multi-dimensional interleaving for time-and-memory design optimization. | Nelson L. Passos, Edwin Hsing-Mean Sha, Liang-Fang Chao |
| 1995 | A parallel algorithm for fault simulation based on PROOFS . | Steven Parkes, Prithviraj Banerjee, Janak H. Patel |
| 1995 | High-radix SRT division with speculation of quotient digits . | Tzu-Hsi Pan, Hyon-Sok Kay, Youngsun Chun, Chin-Long Wey |
| 1995 | Extraction of finite state machines from transistor netlists by symbolic simulation. | Manish Pandey, Alok Jain, Randal E. Bryant, Derek L. Beatty, Gary York, Samir Jain |
| 1995 | PEPPER - a timing driven early floorplanner. | Vinod Narayananan, David LaPotin, Rajesh Gupta, Gopalakrishnan Vijayan |
| 1995 | Logic synthesis for a single large look-up table. | Rajeev Murgai, Masahiro Fujita, Fumiyasu Hirose |
| 1995 | Write buffer design for cache-coherent shared-memory multiprocessors. | Farnaz Mounes-Toussi, David J. Lilja |
| 1995 | The PowerPC 603e microprocessor: an enhanced, low-power, superscalar microprocessor. | Carlos Montemayor, Marie Sullivan, Jen-Tien Yen, Pete Wilson, Richard Evers, K. R. Kishore |
| 1995 | Incas: a cycle accurate model of UltraSPARC. | Guillermo Maturana, James L. Ball, Jeffery Gee, Amaresh Iyer, J. Michael O'Connor |
| 1995 | DART: delay and routability driven technology mapping for LUT based FPGAs. | Aiguo Lu, Erik L. Dagless, Jonathan M. Saul |
| 1995 | A novel architecture for an ATM switch. | Jin Li, Chuan-lin Wu |
| 1995 | An efficient systolic array for the discrete cosine transform based on prime-factor decomposition . | Hyesook Lim, Earl E. Swartzlander Jr. |
| 1995 | Verification of a subtractive radix-2 square root algorithm and implementation. | Miriam Leeser, John W. O'Leary |