| 1993 | Hardware Self-Tuning and Circuit Performance Monitoring. | Ted Kehl |
| 1993 | Pseudoexhaustive BIST for Sequential Circuits. | Dimitrios Kagaris, Spyros Tragoudas, Dinesh Bhatia |
| 1993 | Statistical Timing Optimization of Combinatorial Logic Circuits. | Horng-Fei Jyu, Sharad Malik |
| 1993 | Library-Adaptively Integrated Data Path Synthesis for DSP Systems. | Jer-Min Jou, Shiann-Rong Kuang |
| 1993 | A Comparative Evaluation of Adders Based on Performance and Testability. | Rathish Jayabharathi, Thomas Thomas, Earl E. Swartzlander Jr. |
| 1993 | Hierarchical Constraint Solving in the Parametric Form with Applications to Efficient Symbolic Simulation Based Verification. | Prabhat Jain, Ganesh Gopalakrishnan |
| 1993 | A Novel Clock Distribution System for CMOS VLSI. | Kenichi Ishibashi, Takehisa Hayashi, Toshio Doi, Noboru Masuda, Akira Yamagiwa, Toshihiro Okabe |
| 1993 | Beyond Superscalar Using FPGAs. | Christian Iseli, Eduardo Sanchez |
| 1993 | Efficient Verification of Symmetric Concurrent Systems. | C. Norris Ip, David L. Dill |
| 1993 | Lower Bounds on the Iteration Time and the Number of Resources for Functional Pipelined Data Flow Graphs. | Yuan Hu, Ahmed Ghouse, Bradley S. Carlson |
| 1993 | Formal Semantics of VHDL for Verification of Circuit Designs. | Xin Hua, Hantao Zhang |
| 1993 | Speculative Computation for Coprocessor Synthesis. | Ulrich Holtmann, Rolf Ernst |
| 1993 | Complex Gate Performance Improvement by Jog Insertion into Transistor Gates. | Ronald D. Hindmarsh |
| 1993 | Partitioning and Surmounting the Software-Hardware Abstraction Gap in an ASIC Design Project. | Klaus ten Hagen, Heinrich Meyr |
| 1993 | Phi-Test: Perfect Hashed Index Test for Test Response Validation. | Rajiv Gupta |
| 1993 | A Note About the Correction Cycle of High Radix Booth's Multiplication. | Gong Guo, Mohammad Ashtijou |
| 1993 | Fast CRC Calculation. | Ren J. Glaise, X. Jacquart |
| 1993 | A 400 MHz Wave-Pipelined 8 X 8-Bit Multiplier in CMOS Technology. | Debabrata Ghosh, S. K. Nandy |
| 1993 | Synthesis of Controllers from Interval Temporal Logic Specification. | Masahiro Fujita, Shinji Kono |
| 1993 | An Adaptive Technique for Dynamic Rollback in Concurrent Event-Driven Fault Simulation. | Laura Farinetti, Pier Luca Montessoro |
| 1993 | Economics in Design and Test. | Chryssa Dislis, Anthony P. Ambler, I. D. Dear, J. H. Dick |
| 1993 | Architecture-Compatible Code Boosting for Performance Enhancement of the IBM RS/6000. | Trung A. Diep, Mikko H. Lipasti, John Paul Shen |
| 1993 | A Systolic Architecture for High Speed Pipelined Memories. | Alex G. Dickinson, Chris J. Nicol |
| 1993 | ACES: A Transient Simulation Strategy for Integrated Circuits. | Anirudh Devgan, Ronald A. Rohrer |
| 1993 | System-Level Specification of Instruction Sets. | Todd A. Cook, Paul D. Franzon, Edwin A. Harcourt, Thomas K. Miller III |