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IEEE International Conference on Computer Design

ICCD

C

CORE rank

CORE rank (raw)

C

Fields of research

Computer Systems Engineering

Papers indexed

3,768

1988–2025

Papers per year

1988128 peak2025

ICCD papers

3,768 records sourced from DBLP. Search titles, filter by year, sort by recency.

YearTitleAuthors
1988Current sensing for built-in testing of CMOS circuits.Derek B. I. Feltham, Phil Nigh, L. Richard Carley, Wojciech Maly
1988A highly parallel processor with an instruction set including relational algebra.Pascal Faudemay, Daniel Etiemble, Jean-Luc Bchennec
1988A global chip test implementation including built-in self-test.A. C. Erdal, Pierre A. Uszynski
1988Implementation of fast radix-4 division with operands scaling.Milos D. Ercegovac, Toms Lang, Ramin Modiri
1988A high speed static CMOS PLA architecture.William E. Engeler, Menahem Lowy, John Pedicone, John Bloomer, James Richotte, David Chan
1988A class of fault-tolerant cellular permutation networks.Mohsine Eleuldj, El Mostapha Aboulhamid, Eduard Cerny
1988Optimization for automatic cell assembly.D. P. Dutt, G. Lakhani
1988Transient fault behavior in a microprocessor - A case study.P. Duba, Ravi K. Iyer
1988Super computer technology at Convex.Harold Dozier, Jeff Gruger
1988APES: an integrated system for behavioral design, simulation and evaluation of array processors.Fausto Distante, Vincenzo Piuri
1988Array partitioning: a methodology for reconfigurability and reconfiguration problems.Fausto Distante, Fabrizio Lombardi, Donatella Sciuto
1988Direct synthesis of mapping circuits.Liliana Daz-Olavarrieta, Safwat G. Zaky
1988Gate array technology.Conrad J. Dell'Oca
1988Aliasing errors in signature analysis testing of integrated circuits.Maurizio Damiani, Piero Olivo, Michele Favalli, Bruno Ricc
1988A serial-input serial-output bit-sliced convolver.Luigi Dadda, Luca Breveglieri
1988Verifiable and executable theories of design for synthesizing correct hardware.Shiu-Kai Chin, Kevin J. Greene
1988Tera-Hertz study of normal and superconducting transmission lines.C. C. Chi, D. Grischkowsky
1988Parallel LU factorization for circuit simulation on an MIMD computer.Chien-Chih Chen, Yu-Hen Hu
1988The BACK algorithm for sequential test generation.Wu-Tung Cheng
1988Multi-chip packaging for high performance systems.Clinton C. Chao, Kim H. Chen, Ravi Kaw, Jacques Leibovitz, V. K. Nagesh, Kenneth D. Scholz
1988Test generation in a parallel processing environment.Susheel J. Chandra, Janak H. Patel
1988Simulated annealing on a multiprocessor.Roger D. Chamberlain, Mark N. Edelman, Mark A. Franklin, Ellen E. Witte
1988Extension of a transistor level digital timing simulator to include first order analog behavior.Rakesh Chadha, Chin-Fu Chen
1988Floating point CORDIC for matrix computations.Joseph R. Cavallaro, Franklin T. Luk
1988Random testability analysis: comparing and evaluating existing approaches.Paolo Camurati, Paolo Prinetto, Matteo Sonza Reorda
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