| 2009 | Hierarchical parametric test metrics estimation: A ΣΔ converter BIST case study. | Matthieu Dubois, Haralampos-G. D. Stratigopoulos, Salvador Mir |
| 2009 | Rapid early-stage microarchitecture design using predictive models. | Christophe Dubach, Timothy M. Jones, Michael F. P. O'Boyle |
| 2009 | Extending data prefetching to cope with context switch misses. | Hanyu Cui, Suleyman Sair |
| 2009 | SHIELDSTRAP: Making secure processors truly secure. | Siddhartha Chhabra, Brian Rogers, Yan Solihin |
| 2009 | Iterative built-in testing and tuning of mixed-signal/RF systems. | Abhijit Chatterjee, Donghoon Han, Vishwanath Natarajan, Shyam Kumar Devarakond, Shreyas Sen, Hyun Woo Choi, Rajarajan Senguttuvan, Soumendu Bhattacharya, Abhilash Goyal, Deuk Lee, Madhavan Swaminathan |
| 2009 | A hierarchical approach towards system level static timing verification of SoCs. | Rupsa Chakraborty, Dipanwita Roy Chowdhury |
| 2009 | Testing bio-chips. | Krishnendu Chakrabarty |
| 2009 | A flexible communication scheme for rationally-related clock frequencies. | Jean-Michel Chabloz, Ahmed Hemani |
| 2009 | On-chip bidirectional wiring for heavily pipelined systems using network coding. | Kalyana C. Bollapalli, Rajesh Garg, Kanupriya Gulati, Sunil P. Khatri |
| 2009 | Pragmatic design of gated-diode FinFET DRAMs. | Ajay N. Bhoj, Niraj K. Jha |
| 2009 | Low-overhead error detection for Networks-on-Chip. | Amit Berman, Idit Keidar |
| 2009 | Framework for massively parallel testing at wafer and package test. | A. Hakan Baba, Kee Sup Kim |
| 2009 | 3D stacked power distribution considering substrate coupling. | Amirali Shayan Arani, Xiang Hu, Wanping Zhang, Chung-Kuan Cheng, A. Ege Engin, Xiaoming Chen, Mikhail Popovich |
| 2009 | Performance analysis of decimal floating-point libraries and its impact on decimal hardware and software solutions. | Michael J. Anderson, Chuck Tsen, Liang-Kai Wang, Katherine Compton, Michael J. Schulte |
| 2009 | Computer-aided design for microfluidic chips based on multilayer soft lithography. | Nada Amin, William Thies, Saman P. Amarasinghe |
| 2009 | 3D GPU architecture using cache stacking: Performance, cost, power and thermal analysis. | Ahmed Al-Maashri, Guangyu Sun, Xiangyu Dong, Vijay Narayanan, Yuan Xie |
| 2009 | Efficient calibration of thermal models based on application behavior. | Youngwoo Ahn, Inchoon Yeo, Riccardo Bettati |
| 2009 | Reliable cache design with detection of gate oxide breakdown using BIST. | Fahad Ahmed, Linda S. Milor |
| 2009 | A high throughput FFT processor with no multipliers. | Shakeel S. Abdulla, Haewoon Nam, Mark McDermot, Jacob A. Abraham |
| 2008 | Combined interpolation architecture for soft-decision decoding of Reed-Solomon codes. | Jiangli Zhu, Xinmiao Zhang, Zhongfeng Wang |
| 2008 | Reliability-aware Dynamic Voltage Scaling for energy-constrained real-time embedded systems. | Baoxian Zhao, Hakan Aydin, Dakai Zhu |
| 2008 | On-chip high performance signaling using passive compensation. | Yulei Zhang, Ling Zhang, Akira Tsuchiya, Masanori Hashimoto, Chung-Kuan Cheng |
| 2008 | Two dimensional highly associative level-two cache design. | Chuanjun Zhang, Bing Xue |
| 2008 | Chip level thermal profile estimation using on-chip temperature sensors. | Yufu Zhang, Ankur Srivastava, Mohamed M. Zahran |
| 2008 | Re-examining cache replacement policies. | Jason Zebchuk, Srihari Makineni, Donald Newell |