| 2008 | Dynamic test scheduling for analog circuits for improved test quality. | Ender Yilmaz, Sule Ozev |
| 2008 | Prototyping a hybrid main memory using a virtual machine monitor. | Dong Ye, Aravind Pavuluri, Carl A. Waldspurger, Brian Tsang, Bohuslav Rychlik, Steven Woo |
| 2008 | Quantifying the energy efficiency of coordinated micro-architectural adaptation for multimedia workloads. | Shrirang M. Yardi, Michael S. Hsiao |
| 2008 | Design of application-specific 3D Networks-on-Chip architectures. | Shan Yan, Bill Lin |
| 2008 | Run-time Active Leakage Reduction by power gating and reverse body biasing: An eNERGY vIEW. | Hao Xu, Ranga Vemuri, Wen-Ben Jone |
| 2008 | A high-performance parallel CAVLC encoder on a fine-grained many-core system. | Zhibin Xiao, Bevan M. Baas |
| 2008 | Power-aware soft error hardening via selective voltage scaling. | Kai-Chiang Wu, Diana Marculescu |
| 2008 | Test-access mechanism optimization for core-based three-dimensional SOCs. | Xiaoxia Wu, Yibo Chen, Krishnendu Chakrabarty, Yuan Xie |
| 2008 | Timing analysis considering IR drop waveforms in power gating designs. | Shih-Hung Weng, Yu-Min Kuo, Shih-Chieh Chang, Malgorzata Marek-Sadowska |
| 2008 | Making register file resistant to power analysis attacks. | Shuo Wang, Fan Zhang, Jianwei Dai, Lei Wang, Zhijie Jerry Shi |
| 2008 | Reversi: Post-silicon validation system for modern microprocessors. | Ilya Wagner, Valeria Bertacco |
| 2008 | Router and cell library co-development for improving redundant via insertion at pins. | Wei-Chiu Tseng, Yu-Hsing Chen, Rung-Bin Lin |
| 2008 | A study of reliability issues in clock distribution networks. | Aida Todri, Malgorzata Marek-Sadowska |
| 2008 | A family of scalable FFT architectures and an implementation of 1024-point radix-2 FFT for real-time communications. | Adnan Suleiman, Hani Saleh, Adel Hussein, David Akopian |
| 2008 | Suitable cache organizations for a novel biomedical implant processor. | Christos Strydis |
| 2008 | Modeling and analysis of non-rectangular transistors caused by lithographic distortions. | Aswin Sreedhar, Sandip Kundu |
| 2008 | RMA: A Read Miss-Based Spin-Down Algorithm using an NV cache. | Hyotaek Shim, Jaegeuk Kim, Dawoon Jung, Jin-Soo Kim, Seungryoul Maeng |
| 2008 | Removing hazards in multi-level logic optimization for generalized fundamental-mode asynchronous circuits. | Feng Shi |
| 2008 | Area and power-delay efficient state retention pulse-triggered flip-flops with scan and reset capabilities. | Kaijian Shi |
| 2008 | Gate planning during placement for gated clock network. | Weixiang Shen, Yici Cai, Xianlong Hong, Jiang Hu |
| 2008 | A fine-grain dynamic sleep control scheme in MIPS R3000. | Naomi Seki, Lei Zhao, Jo Kei, Daisuke Ikebuchi, Yu Kojima, Yohei Hasegawa, Hideharu Amano, Toshihiro Kashima, Seidai Takeda, Toshiaki Shirai, Mitsutaka Nakata, Kimiyoshi Usami, Tetsuya Sunata, Jun Kanai, Mitaro Namiki, Masaaki Kondo, Hiroshi Nakamura |
| 2008 | Leveraging speculative architectures for run-time program validation. | Juan Carlos Martnez Santos, Yunsi Fei |
| 2008 | Architecture implementation of an improved decimal CORDIC method. | Jos Luis Snchez, Higinio Mora Mora, Jernimo Mora Pascual, Antonio Jimeno |
| 2008 | A floating-point fused dot-product unit. | Hani H. Saleh, Earl E. Swartzlander Jr. |
| 2008 | A resource efficient content inspection system for next generation Smart NICs. | Karthik Sabhanatarajan, Ann Gordon-Ross |