| 2008 | In-field NoC-based SoC testing with distributed test vector storage. | Jason D. Lee, Rabi N. Mahapatra |
| 2008 | Understanding performance, power and energy behavior in asymmetric multiprocessors. | Nagesh B. Lakshminarayana, Hyesoon Kim |
| 2008 | Variation-aware thermal characterization and management of multi-core architectures. | Eren Kursun, Chen-Yong Cher |
| 2008 | SynECO: Incremental technology mapping with constrained placement and fast detail routing for predictable timing improvement. | Anuj Kumar, Tai-Hsuan Wu, Azadeh Davoodi |
| 2008 | Global bus route optimization with application to microarchitectural design exploration. | Dae Hyun Kim, Sung Kyu Lim |
| 2008 | Mathematical analysis of buffer sizing for Network-on-Chips under multimedia traffic. | Ahmad Khonsari, Mohammad R. Aghajani, Arash Tavakkol, Mohammad Sadegh Talebi |
| 2008 | Frequency and voltage planning for multi-core processors under thermal constraints. | Michael Kadin, Sherief Reda |
| 2008 | Configurable rectilinear Steiner tree construction for SoC and nano technologies. | Iris Hui-Ru Jiang, Yen-Ting Yu |
| 2008 | Power-state-aware buffered tree construction. | Iris Hui-Ru Jiang, Ming-Hua Wu |
| 2008 | Energy-aware opcode design. | Balaji V. Iyer, Jason A. Poovey, Thomas M. Conte |
| 2008 | Safe clocking register assignment in datapath synthesis. | Keisuke Inoue, Mineo Kaneko, Tsuyoshi Iwagaki |
| 2008 | Energy-delay tradeoffs in 32-bit static shifter designs. | Steven Huntzicker, Michael Dayringer, Justin Soprano, Anthony Weerasinghe, David Money Harris, Dinesh Patil |
| 2008 | A dynamic accuracy-refinement approach to timing-driven technology mapping. | Sz-Cheng Huang, Jie-Hong Roland Jiang |
| 2008 | Custom rotary clock router. | Vinayak Honkote, Baris Taskin |
| 2008 | Adaptive techniques for leakage power management in L2 cache peripheral circuits. | Houman Homayoun, Alexander V. Veidenbaum, Jean-Luc Gaudiot |
| 2008 | ZZ-HVS: Zig-zag horizontal and vertical sleep transistor sharing to reduce leakage power in on-chip SRAM peripheral circuits. | Houman Homayoun, Mohammad A. Makhzan, Alexander V. Veidenbaum |
| 2008 | Acquiring an exhaustive, continuous and real-time trace from SoCs. | Christian Hochberger, Alexander Weiss |
| 2008 | Improved combined binary/decimal fixed-point multipliers. | Brian J. Hickmann, Michael J. Schulte, Mark A. Erle |
| 2008 | Accelerating search and recognition with a TCAM functional unit. | Atif Hashmi, Mikko H. Lipasti |
| 2008 | Digital filter synthesis considering multiple adder graphs for a coefficient. | Jeong-Ho Han, In-Cheol Park |
| 2008 | Design and evaluation of an optical CPU-DRAM interconnect. | Amit Hadke, Tony Benavides, Rajeevan Amirtharajah, Matthew K. Farrens, Venkatesh Akella |
| 2008 | Optimizing data sharing and address translation for the Cell BE Heterogeneous Chip Multiprocessor. | Michael Gschwind |
| 2008 | Hierarchical simulation-based verification of Anton, a special-purpose parallel machine. | J. P. Grossman, John K. Salmon, C. Richard Ho, Doug Ierardi, Brian Towles, Brannon Batson, Jochen Spengler, Stanley C. Wang, Rolf Mueller, Michael Theobald, Cliff Young, Joseph Gagliardo, Martin M. Deneroff, Ron O. Dror, David E. Shaw |
| 2008 | Quantitative global dataflow analysis on virtual instruction set simulators for hardware/software co-design. | Carsten Gremzow |
| 2008 | Low-cost open-page prefetch scheduling in chip multiprocessors. | Marius Granns, Magnus Jahre, Lasse Natvig |