| 2004 | Technique to Eliminate Sorting in IP Packet Forwarding Devices. | Raymond W. Baldwin, Enrico Ng |
| 2004 | Reducing Issue Queue Power for Multimedia Applications using a Feedback Control Algorithm. | Yu Bai, R. Iris Bahar |
| 2004 | Extending the Applicability of Parallel-Serial Scan Designs. | Baris Arslan, Ozgur Sinanoglu, Alex Orailoglu |
| 2004 | A Depth-First-Search Controlled Gridless Incremental Routing Algorithm for VLSI Circuits. | Hasan Arslan, Shantanu Dutt |
| 2004 | PCAM: A Ternary CAM Optimized for Longest Prefix Matching Tasks. | Mohammad J. Akhbarizadeh, Mehrdad Nourani, Deepak S. Vijayasarathi, Poras T. Balsara |
| 2004 | Defining Wakeup Width for Efficient Dynamic Scheduling. | Aneesh Aggarwal, Manoj Franklin, Oguz Ergin |
| 2003 | Verification of Timed Circuits with Failure Directed Abstractions. | Hao Zheng, Chris J. Myers, David Walter, Scott Little, Tomohiro Yoneda |
| 2003 | A Compact Model for Analysis and Design of On-chip Power Network with Decoupling Capacitors. | Payman Zarkesh-Ha, Ken Doniger, William Loh, Dechang Sun, Rick Stephani, Gordon Priebe |
| 2003 | Dynamic Thread Resizing for Speculative Multithreaded Processors. | Mohamed M. Zahran, Manoj Franklin |
| 2003 | Structured ASICs: Opportunities and Challenges. | Behrooz Zahiri |
| 2003 | Enhanced QMM-BEM Solver for 3-D Finite-Domain Capacitance Extraction with Multilayered Dielectrics. | Wenjian Yu, Zeyi Wang, Xianlong Hong |
| 2003 | Multiple Fault Diagnosis Using n-Detection Tests. | Zhiyuan Wang, Malgorzata Marek-Sadowska, Kun-Han Tsai, Janusz Rajski |
| 2003 | Structural Detection of Symmetries in Boolean Functions. | Guoqiang Wang, Andreas Kuehlmann, Alberto L. Sangiovanni-Vincentelli |
| 2003 | Advanced EDA Tools for High-Performance Design. | Ted Vucurevich |
| 2003 | A Transparent Voltage Conversion Method and Its Application to a Dual-Supply-Voltage Register File. | Nestoras Tzartzanis, William W. Walker |
| 2003 | Bus Architecture Synthesis for Hardware-Software Co-Design of Deep Submicron Systems on Chip. | Nattawut Thepayasuwan, Vaishali Damle, Alex Doboli |
| 2003 | Multiple Transition Model and Enhanced Boundary Scan Architecture to Test Interconnects for Signal Integrity. | Mohammad H. Tehranipour, Nisar Ahmed, Mehrdad Nourani |
| 2003 | Low Power Adder with Adaptive Supply Voltage. | Hiroaki Suzuki, Woopyo Jeong, Kaushik Roy |
| 2003 | Symbolic Failure Analysis of Custom Circuits due to Excessive Leakage Current. | Hui-Yuan Song, S. Bohidar, R. Iris Bahar, Joel Grodstein |
| 2003 | Aggressive Test Power Reduction Through Test Stimuli Transformation. | Ozgur Sinanoglu, Alex Orailoglu |
| 2003 | Exploiting Microarchitectural Redundancy For Defect Tolerance. | Premkishore Shivakumar, Stephen W. Keckler, Charles R. Moore, Doug Burger |
| 2003 | Low-Density Parity-Check Decoder Architecture for High Throughput Optical Fiber Channels. | Anand Selvarathinam, Euncheol Kim, Gwan Choi |
| 2003 | SAT-Based Algorithms for Logic Minimization. | Samir Sapra, Michael Theobald, Edmund M. Clarke |
| 2003 | Routed Inter-ALU Networks for ILP Scalability and Performance. | Karthikeyan Sankaralingam, Vincent Ajay Singh, Stephen W. Keckler, Doug Burger |
| 2003 | Reducing Compilation Time Overhead in Compiled Simulators. | Mehrdad Reshadi, Nikil D. Dutt |