| 2003 | Boolean Decomposition Based on Cyclic Chains. | Elena Dubrova, Maxim Teslenko, Johan Karlsson |
| 2003 | Independent Test Sequence Compaction through Integer Programming. | Petros Drineas, Yiorgos Makris |
| 2003 | Physical Design of the "2.5D" Stacked System. | Yangdong Deng, Wojciech Maly |
| 2003 | Reducing dTLB Energy Through Dynamic Resizing. | Victor Delaluz, Mahmut T. Kandemir, Anand Sivasubramaniam, Mary Jane Irwin, Narayanan Vijaykrishnan |
| 2003 | Optimal Inductance for On-chip RLC Interconnections. | Shidhartha Das, Kanak Agarwal, David T. Blaauw, Dennis Sylvester |
| 2003 | xpipes: a Latency Insensitive Parameterized Network-on-chip Architecture For Multi-Processor SoCs. | Matteo Dall'Osso, Gianluca Biccari, Luca Giovannini, Davide Bertozzi, Luca Benini |
| 2003 | Specifying and Verifying Systems with Multiple Clocks. | Edmund M. Clarke, Daniel Kroening, Karen Yorav |
| 2003 | Flow-Based Cell Moving Algorithm for Desired Cell Distribution. | Bo-Kyung Choi, Huaiyu Xu, Maogang Wang, Majid Sarrafzadeh |
| 2003 | Procedures for Identifying Untestable and Redundant Transition Faults in Synchronous Sequential Circuits. | Gang Chen, Sudhakar M. Reddy, Irith Pomeranz |
| 2003 | A Simple Yet Effective Merging Scheme for Prescribed-Skew Clock Routing. | Rishi Chaturvedi, Jiang Hu |
| 2003 | Design of Resonant Global Clock Distributions. | Steven C. Chan, Kenneth L. Shepard, Phillip J. Restle |
| 2003 | Dynamically Optimized Synchronous Communication for Low Power System on Chip Designs. | Vikas Chandra, Gary D. Carpenter, Jeffrey L. Burns |
| 2003 | Non-Crossing OBDDs for Mapping to Regular Circuit Structures. | Aiqun Cao, Cheng-Kok Koh |
| 2003 | Reducing Operand Transport Complexity of Superscalar Processors using Distributed Register Files. | Santithorn Bunchua, D. Scott Wills, Linda M. Wills |
| 2003 | Modeling and Mitigation of Jitter in Multi-Gbps Source-Synchronous I/O Links. | Ganesh Balamurugan, Naresh R. Shanbhag |
| 2003 | ROAD : An Order-Impervious Optimal Detailed Router for FPGAs. | Hasan Arslan, Shantanu Dutt |
| 2003 | Cost-Effective Graceful Degradation in Speculative Processor Subsystems: The Branch Prediction Case. | Sobeeh Almukhaizim, Thomas Verdel, Yiorgos Makris |
| 2003 | Spec Based Flip-Flop And Buffer Insertion. | Nataraj Akkiraju, Mosur Mohan |
| 2003 | Energy Efficient Asymmetrically Ported Register Files. | Aneesh Aggarwal, Manoj Franklin |
| 2003 | On Reducing Register Pressure and Energy in Multiple-Banked Register Files. | Jaume Abella, Antonio Gonzlez |
| 2003 | Power Efficient Data Cache Designs. | Jaume Abella, Antonio Gonzlez |
| 2003 | Precomputation-based Guarding for Dynamic and Leakage Power Reduction. | Afshin Abdollahi, Massoud Pedram, Farzan Fallah, Indradeep Ghosh |
| 2002 | Register Binding Based Power Management for High-level Synthesis of Control-Flow Intensive Behaviors. | Lin Zhong, Jiong Luo, Yunsi Fei, Niraj K. Jha |
| 2002 | Exact Closed Form Formula for Partial Mutual Inductances of On-Chip Interconnects. | Guoan Zhong, Cheng-Kok Koh |
| 2002 | Improving Processor Performance by Simplifying and Bypassing Trivial Computations. | Joshua J. Yi, David J. Lilja |