| 2011 | SRAM-DRAM hybrid memory with applications to efficient register files in fine-grained multi-threading. | Wing-Kei S. Yu, Ruirui C. Huang, Sarah Q. Xu, Sung-En Wang, Edwin Kan, G. Edward Suh |
| 2011 | Adaptive granularity memory systems: a tradeoff between storage efficiency and throughput. | Doe Hyun Yoon, Min Kyu Jeong, Mattan Erez |
| 2011 | Combining memory and a controller with photonics through 3D-stacking to enable scalable and energy-efficient systems. | Aniruddha N. Udipi, Naveen Muralimanohar, Rajeev Balasubramonian, Al Davis, Norman P. Jouppi |
| 2011 | Crafting a usable microkernel, processor, and I/O system with strict and provable information flow security. | Mohit Tiwari, Jason Oberg, Xun Li, Jonathan Valamehr, Timothy E. Levin, Ben Hardekopf, Ryan Kastner, Frederic T. Chong, Timothy Sherwood |
| 2011 | The impact of memory subsystem resource sharing on datacenter applications. | Lingjia Tang, Jason Mars, Neil Vachharajani, Robert Hundt, Mary Lou Soffa |
| 2011 | Moguls: a model to explore the memory hierarchy for bandwidth improvements. | Guangyu Sun, Christopher J. Hughes, Changkyu Kim, Jishen Zhao, Cong Xu, Yuan Xie, Yen-Kuang Chen |
| 2011 | Releasing efficient beta cores to market early. | Sangeetha Sudhakrishnan, Rigo Dicochea, Jose Renau |
| 2011 | Vantage: scalable and efficient fine-grain cache partitioning. | Daniel Snchez, Christos Kozyrakis |
| 2011 | TLSync: support for multiple fast barriers using on-chip transmission lines. | Jungju Oh, Milos Prvulovic, Alenka G. Zajic |
| 2011 | Sampling + DMR: practical and low-overhead permanent fault detection. | Shuou Nomura, Matthew D. Sinclair, Chen-Han Ho, Venkatraman Govindaraju, Marc de Kruijf, Karthikeyan Sankaralingam |
| 2011 | A case for heterogeneous on-chip interconnects for CMPs. | Asit K. Mishra, Narayanan Vijaykrishnan, Chita R. Das |
| 2011 | Architecting on-chip interconnects for stacked 3D STT-RAM caches in CMPs. | Asit K. Mishra, Xiangyu Dong, Guangyu Sun, Yuan Xie, Narayanan Vijaykrishnan, Chita R. Das |
| 2011 | Power management of online data-intensive services. | David Meisner, Christopher M. Sadler, Luiz Andr Barroso, Wolf-Dietrich Weber, Thomas F. Wenisch |
| 2011 | CPPC: correctable parity protected cache. | Mehrtash Manoochehri, Murali Annavaram, Michel Dubois |
| 2011 | Scalable power control for many-core architectures running multi-threaded applications. | Kai Ma, Xue Li, Ming Chen, Xiaorui Wang |
| 2011 | DBAR: an efficient routing algorithm to support multiple concurrent applications in networks-on-chip. | Sheng Ma, Natalie D. Enright Jerger, Zhiying Wang |
| 2011 | Exploring the tradeoffs between programmability and efficiency in data-parallel accelerators. | Yunsup Lee, Rimas Avizienis, Alex Bishara, Richard Xia, Derek Lockhart, Christopher Batten, Krste Asanovic |
| 2011 | Virtualizing performance asymmetric multi-core systems. | Youngjin Kwon, Changdae Kim, Seungryoul Maeng, Jaehyuk Huh |
| 2011 | Automatic abstraction and fault tolerance in cortical microachitectures. | Atif Hashmi, Hugues Berry, Olivier Temam, Mikko H. Lipasti |
| 2011 | CRIB: consolidated rename, issue, and bypass. | Erika Gunadi, Mikko H. Lipasti |
| 2011 | Kilo-NOC: a heterogeneous network-on-chip architecture for scalability and service guarantees. | Boris Grot, Joel Hestness, Stephen W. Keckler, Onur Mutlu |
| 2011 | Demand-driven software race detection using hardware performance counters. | Joseph L. Greathouse, Zhiqiang Ma, Matthew I. Frank, Ramesh Peri, Todd M. Austin |
| 2011 | Benefits and limitations of tapping into stored energy for datacenters. | Sriram Govindan, Anand Sivasubramaniam, Bhuvan Urgaonkar |
| 2011 | Energy-efficient mechanisms for managing thread context in throughput processors. | Mark Gebhart, Daniel R. Johnson, David Tarjan, Stephen W. Keckler, William J. Dally, Erik Lindholm, Kevin Skadron |
| 2011 | Bypass and insertion algorithms for exclusive last-level caches. | Jayesh Gaur, Mainak Chaudhuri, Sreenivas Subramoney |