| 2006 | Learning-Based SMT Processor Resource Distribution via Hill-Climbing. | Seungryul Choi, Donald Yeung |
| 2006 | Interconnect-Aware Coherence Protocols for Chip Multiprocessors. | Liqun Cheng, Naveen Muralimanohar, Karthik Ramani, Rajeev Balasubramonian, John B. Carter |
| 2006 | Cooperative Caching for Chip Multiprocessors. | Jichuan Chang, Gurindar S. Sohi |
| 2006 | Bulk Disambiguation of Speculative Threads in Multiprocessors. | Luis Ceze, James Tuck, Josep Torrellas, Calin Cascaval |
| 2006 | A Scalable Architecture For High-Throughput Regular-Expression Pattern Matching. | Benjamin C. Brodie, David E. Taylor, Ron K. Cytron |
| 2006 | Program Demultiplexing: Data-flow based Speculative Parallelization of Methods in Sequential Programs. | Saisanthosh Balakrishnan, Gurindar S. Sohi |
| 2006 | Memory Model = Instruction Reordering + Store Atomicity. | Arvind, Jan-Willem Maessen |
| 2005 | Victim Replication: Maximizing Capacity while Hiding Wire Delay in Tiled Chip Multiprocessors. | Michael Zhang, Krste Asanovic |
| 2005 | RENO - A Rename-Based Instruction Optimizer. | Vlad Petric, Tingting Sha, Amir Roth |
| 2005 | Continuous Optimization. | Brian Fahs, Todd M. Rafacz, Sanjay J. Patel, Steven S. Lumetta |
| 2005 | A Robust Main-Memory Compression Scheme. | Magnus Ekman, Per Stenstrm |
| 2005 | Temporal Streaming of Shared Memory. | Thomas F. Wenisch, Stephen Somogyi, Nikolaos Hardavellas, Jangwoo Kim, Anastassia Ailamaki, Babak Falsafi |
| 2005 | Store Buffer Design in First-Level Multibanked Data Caches. | Enrique F. Torres, Pablo Ibez, Vctor Vials, Jos Mara Llabera |
| 2005 | A High Throughput String Matching Architecture for Intrusion Detection and Prevention. | Lin Tan, Timothy Sherwood |
| 2005 | Increased Scalability and Power Efficiency by Using Multiple Speed Pipelines. | Emil Talpes, Diana Marculescu |
| 2005 | Design and Implementation of the AEGIS Single-Chip Secure Processor Using Physical Random Functions. | G. Edward Suh, Charles W. O'Donnell, Ishan Sachdev, Srinivas Devadas |
| 2005 | Exploiting Structural Duplication for Lifetime Reliability Enhancement. | Jayanth Srinivasan, Sarita V. Adve, Pradip Bose, Jude A. Rivers |
| 2005 | Adaptive Mechanisms and Policies for Managing Cache Hierarchies in Chip Multiprocessors. | Evan Speight, Hazim Shafi, Lixin Zhang, Ramakrishnan Rajamony |
| 2005 | High Efficiency Counter Mode Security Architecture via Prediction and Precomputation. | Weidong Shi, Hsien-Hsin S. Lee, Mrinmoy Ghosh, Chenghuai Lu, Alexandra Boldyreva |
| 2005 | Analysis of the O-GEometric History Length Branch Predictor. | Andr Seznec |
| 2005 | Near-Optimal Worst-Case Throughput Routing for Two-Dimensional Mesh Networks. | Daeho Seo, Akif Ali, Won-Taek Lim, Nauman Rafique, Mithuna Thottethodi |
| 2005 | Rescue: A Microarchitecture for Testability and Defect Tolerance. | Ethan Schuchman, T. N. Vijaykumar |
| 2005 | Store Vulnerability Window (SVW): Re-Execution Filtering for Enhanced Load Optimization. | Amir Roth |
| 2005 | Design and Evaluation of Hybrid Fault-Detection Systems. | George A. Reis, Jonathan Chang, Neil Vachharajani, Ram Rangan, David I. August, Shubhendu S. Mukherjee |
| 2005 | Virtualizing Transactional Memory. | Ravi Rajwar, Maurice Herlihy, Konrad K. Lai |