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ACM International Symposium on Computer Architecture

ISCA

A*

CORE rank

CORE rank (raw)

A*

Acceptance rate

19.0% (2024)

Fields of research

Computer Systems Engineering · Distributed Computing and Systems Software · Software Engineering

Papers indexed

2,833

1973–2026

Papers per year

1973172 peak2026

ISCA papers

2,833 records sourced from DBLP. Search titles, filter by year, sort by recency.

YearTitleAuthors
2002Design Tradeoffs for the Alpha EV8 Conditional Branch Predictor.Andr Seznec, Stephen Felix, Venkata Krishnan, Yiannakis Sazeides
2002A Scalable Instruction Queue Design Using Dependence Chains.Steven E. Raasch, Nathan L. Binkert, Steven K. Reinhardt
2002ReVive: Cost-Effective Architectural Support for Rollback Recovery in Shared-Memory Multiprocessors.Milos Prvulovic, Josep Torrellas, Zheng Zhang
2002Speculative Dynamic Vectorization.Alex Pajuelo, Antonio Gonzlez, Mateo Valero
2002Detailed Design and Evaluation of Redundant Multithreading Alternatives.Shubhendu S. Mukherjee, Michael Kontz, Steven K. Reinhardt
2002Avoiding Initialization Misses to the Heap.Jarrod A. Lewis, Mikko H. Lipasti, Bryan Black
2002A Large, Fast Instruction Window for Tolerating Cache Misses.Alvin R. Lebeck, Tong Li, Eric Rotenberg, Jinson Koppanalil, Jaidev P. Patwardhan
2002An Instruction Set and Microarchitecture for Instruction Level Distributed Processing.Ho-Seop Kim, James E. Smith
2002Implementing Optimizations at Decode Time.Ilhyun Kim, Mikko H. Lipasti
2002Going the Distance for TLB Prefetching: An Application-Driven Study.Gokul B. Kandiraju, Anand Sivasubramaniam
2002Power and Performance Evaluation of Globally Asynchronous Locally Synchronous Processors.Anoop Iyer, Diana Marculescu
2002Timekeeping in the Memory System: Predicting and Optimizing Memory Behavior.Zhigang Hu, Margaret Martonosi, Stefanos Kaxiras
2002The Optimal Logic Depth Per Pipeline Stage is 6 to 8 FO4 Inverter Delays.M. S. Hrishikesh, Doug Burger, Stephen W. Keckler, Premkishore Shivakumar, Norman P. Jouppi, Keith I. Farkas
2002Dynamic Fine-Grain Leakage Reduction Using Leakage-Biased Bitlines.Seongmoo Heo, Kenneth C. Barr, Mark Hampton, Krste Asanovic
2002The Optimum Pipeline Depth for a Microprocessor.Allan Hartstein, Thomas R. Puzak
2002Drowsy Caches: Simple Techniques for Reducing Leakage Power.Krisztin Flautner, Nam Sung Kim, Steven M. Martin, David T. Blaauw, Trevor N. Mudge
2002Slack: Maximizing Performance Under Technological Constraints.Brian A. Fields, Rastislav Bodk, Mark D. Hill
2002Tarantula: A Vector Extension to the Alpha Architecture.Roger Espasa, Federico Ardanaz, Julio Gago, Roger Gramunt, Isaac Hernandez, Toni Juan, Joel S. Emer, Stephen Felix, P. Geoffrey Lowney, Matthew Mattina, Andr Seznec
2002Efficient Dynamic Scheduling Through Tag Elimination.Dan Ernst, Todd M. Austin
2002Managing Multi-Configuration Hardware via Dynamic Working Set Analysis.Ashutosh S. Dhodapkar, James E. Smith
2002Difficult-Path Branch Prediction Using Subordinate Microthreads.Robert S. Chappell, Francis Tseng, Yale N. Patt, Adi Yoaz
2002Queue Pair IP: A Hybrid Architecture for System Area Networks.Philip Buonadonna, David E. Culler
2001Execution-based prediction using speculative slices.Craig B. Zilles, Gurindar S. Sohi
2001QoS provisioning in clusters: an investigation of Router and NIC design.Ki Hwan Yum, Eun Jung Kim, Chita R. Das
2001CryptoManiac: a fast flexible architecture for secure communication.Lisa Wu, Christopher T. Weaver, Todd M. Austin
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Comparable venues

Other A*/A conferences filed under the same field of research.