| 2000 | SOI Digital Circuits: Design Issues. | Ruchir Puri, Ching-Te Chuang |
| 2000 | On Synchronizing Sequences and Unspecified Values in Output Responses of Synchronous Sequential Circuits. | Irith Pomeranz, Sudhakar M. Reddy |
| 2000 | Design of Synchronous Action Systems. | Juha Plosila, Tiberiu Seceleanu |
| 2000 | A Tight Area Upper Bound for Slicing Floorplans. | Helvio P. Peixoto, Margarida F. Jacome, Ander Royo |
| 2000 | GF(2p) CA Based Vector Quantization for Fast Encoding of Still Images. | Kolin Paul, Ranadeep Ghosal, Biplab K. Sikdar, Santashil Pal Chaudhuri, Dipanwita Roy Chowdhury |
| 2000 | Scalable Pipelined Micro-Architecture for Wavelet Transform. | Kolin Paul, Parimal Pal Chaudhuri, Dipanwita Roy Chowdhury |
| 2000 | Application of GF(2p) CA in Burst Error Correcting Codes. | Kolin Paul, Dipanwita Roy Chowdhury |
| 2000 | Test Techniques and Trade-offs for Embedded Cores and Systems. | Rubin A. Parekhji |
| 2000 | Inductive Noise Reduction at the Architectural Level. | Mondira Deb Pant, Pankaj Pant, D. Scott Wills, Vivek Tiwari |
| 2000 | A Single-Chip Programmable Digital CMOS Imager with Enhanced Low-Light Detection Capability. | Bedabrata Pain, Guang Yang, Monico Ortiz, Kenneth McCarty, Julie Heynssens, Bruce Hancock, Thomas Cunningham, Chris Wrigley, Charlie Ho |
| 2000 | Maximizing Wafer Productivity Through Layout Optimization. | Charles H. Ouyang, Hans T. Heineken, Jitendra Khare, Saghir A. Shaikh, Manuel d'Abreu |
| 2000 | Computer-aided Design of RF Communication Systems: Techniques and Challenges. | Laurence Nagel, Jaijeet S. Roychowdhury |
| 2000 | A Practical Approach to Crosstalk Noise Verification of Static CMOS Designs. | N. S. Nagaraj, Frank Cano, Duane Young, Deepak Vohra, Manoj Das |
| 2000 | Delay-Constrained Area Recovery Via Layout-Driven Buffer Optimization. | Rajeev Murgai |
| 2000 | Testing Flash Memories. | Mohammad Gh. Mohammad, Kewal K. Saluja, Alex S. Yap |
| 2000 | Challenges of Merging Digital Imaging and Wireless Communication. | Werner Metz, Tinku Acharya |
| 2000 | Power Reduction Techniques for Portable DSP Applications. | Mahesh Mehendale, Sunil D. Sherlekar |
| 2000 | A Versatile BIST Technique Combining Test Registers and Accumulators. | Frank Mayer, Albrecht P. Stroele |
| 2000 | State-Machine Based Logic Simulation Using Three Logic Values. | Peter M. Maurer, William J. Schilp |
| 2000 | Surviving the SOC Revolution: The Platform Approach to SOC Design. | Grant Martin |
| 2000 | A Genetic Algorithm for the Synthesis of Structured Data Paths. | Chittaranjan A. Mandal, R. M. Zimmer |
| 2000 | Design of an ASIC for Straight Line Detection in an Image. | Arun K. Majumdar, Nirav Patel |
| 2000 | A 3.3V Compatible 2.5V TTL-to-CMOS Bidirectional I/O Buffer. | Sanjeev Kumar Maheshwari, G. S. Visweswaran |
| 2000 | Jitter Estimation Methodology for Clock Chips. | Sanjeev Kumar Maheshwari, R. S. Krishanan, G. S. Visweswaran |
| 2000 | Low Power Realization of Residue Number System Based FIR Filters. | M. N. Mahesh, Mahesh Mehendale |