| 2000 | CREAM: Combined Register and Module Assignment with Floorplanning for Low Power Datapath Synthesis. | Vamsi K. Srikantam, N. Ranganathan, Srikanth Srinivasan |
| 2000 | Energy Aware Software. | Amit Sinha, Anantha P. Chandrakasan |
| 2000 | Theory and Application of GF(2p) Cellular Automata as On-chip Test Pattern Generator. | Biplab K. Sikdar, Kolin Paul, Gosta Pada Biswas, Parimal Pal Chaudhuri, Vamsi Boppana, Cliff Yang, Sobhan Mukherjee |
| 2000 | Optimal Hardware/Software Partitioning for Concurrent Specification Using Dynamic Programming. | Aviral Shrivastava, Mohit Kumar, Sanjiv Kapoor, Shashi Kumar, M. Balakrishnan |
| 2000 | Efficient Implementation of ADPCM Codec. | Anil Sharma, C. P. Ravikumar |
| 2000 | Manufacturability and Testability Oriented Synthesis. | Saghir A. Shaikh, Jitendra Khare, Hans T. Heineken |
| 2000 | Inductance Characterization of Small Interconnects Using Test-Signal Method. | Jeegar Tilak Shah, Madhav P. Desai, Sugata Sanyal |
| 2000 | Silicon Heterostructure Devices for RF Wireless Communication. | B. Senapati, Chinmay K. Maiti, Nirmal B. Chakrabarti |
| 2000 | Combining Background Memory Management and Regular Array Co-Partitioning, Illustrated on a Full Motion Estimation Kernel. | Rainer Schaffer, Renate Merker, Francky Catthoor |
| 2000 | DSP-The Real Time Technology for the New Millennium. | John Scarisbric |
| 2000 | An Assertion Based Technique for Transistor Level Dynamic Power Estimation. | Savithri Sundareswaran, R. Venkatesan, S. Bhaskar |
| 2000 | Digital Imaging with Wireless Data Services. | Sandip Sarkar |
| 2000 | Status Condition Analysis during Data Path Verification of Sequential Circuits. | Dipankar Sarkar |
| 2000 | Capturing the Effect of Crosstalk on Delay. | Sachin S. Sapatnekar |
| 2000 | Computing and Communication in the New Millennium. | Avtar Saini |
| 2000 | Low Power VLSI Signal Processing. | Kaushik Roy, Khurram Muhammad |
| 2000 | Dataflow Analysis for Resource Contention and Register Leakage Properties. | Subir K. Roy, Hiroaki Iwashita, Tsuneo Nakata |
| 2000 | Automatic Component Matching Using Forced Simulation. | Partha S. Roop, Arcot Sowmya, S. Ramesh |
| 2000 | A Mixed-Signal BIST Scheme with Time-Division Multiplexing (TDM) Comparator and Counters. | Jeongjin Roh, Jacob A. Abraham |
| 2000 | Design of OTA Based Field Programmable Analog Array. | Baidya Nath Ray, Parimal Pal Chaudhuri, Prasanta Kumar Nandi |
| 2000 | Simultaneous Module Selection and Scheduling for Power-Constrained Testing of Core Based Systems. | C. P. Ravikumar, Gaurav Chandra, Ashutosh Verma |
| 2000 | nterface Synthesis: Issues and Approaches. | Arvind Rajawat, M. Balakrishnan, Anshul Kumar |
| 2000 | Optimization of the One-Dimensional Full Search Algorithm and Implementation Using an EPLD. | Rajesh T. N. Rajaram, Vinita Vasudevan |
| 2000 | Modeling VHDL in Multiclock ESTEREL. | Basant Rajan, R. K. Shyamasundar |
| 2000 | High-Level Synthesis with Variable-Latency Components. | Vijay Raghunathan, Srivaths Ravi, Ganesh Lakshminarayana |