| 1997 | Synthesis of Analog CMOS Circuits. | K. Ravi Shanker, Vinita Vasudevan |
| 1997 | Tuning Schemes for Transmission Zeros of Continuous-Time Filters. | K. Ravi Shankar, K. Radhakrishna Rao, Srinivasan Venkatraman |
| 1997 | VLSI Implementation of Modulo Multiplication Using Carry Free Addition. | Palash Sarkar, Bimal K. Roy, Pabitra Pal Choudhury |
| 1997 | Analyzing Controllability of a Hardware Circuit for its Reuse. | Santonu Sarkar, Anupam Basu, Arun K. Majumdar |
| 1997 | Algorithms for Low Power FIR Filter Realization Using Differential Coefficients. | Naushik Sankarayya, Kaushik Roy, Debashis Bhattacharya |
| 1997 | Hardware Software Partitioning Using Genetic Algorithm. | Debanjan Saha, Anupam Basu, Raj S. Mitra |
| 1997 | Overcoming the Serial Logic Simulation Bottleneck in Parallel Fault Simulation. | Elizabeth M. Rudnick, Janak H. Patel |
| 1997 | T5: Low-Power Design. | Kaushik Roy, Rabindra K. Roy, Ramesh Harjani, K. S. Murthy |
| 1997 | Developing A New Approach For Multimedia Design. | Walden C. Rhines |
| 1997 | Faster Fault Simulation Through Distributed Computing. | C. P. Ravikumar, Vikas Jain, Anurag Dod |
| 1997 | A Graph-Theoretic Approach for Register File Based Synthesis. | C. P. Ravikumar, R. Aggarwal, C. Sharma |
| 1997 | C3L: A Chip for Connected Component Labeling. | Ashley Rasquinha, N. Ranganathan |
| 1997 | T1: Multimedia. | K. R. Rao, Magdy A. Bayoumi, T. V. Subramaniam |
| 1997 | Low-Power Configurable Processor Array for DLMS Adaptive Filtering. | S. Ramanathan, V. Visvanathan |
| 1997 | Effective Heuristics for Timing Driven Constructive Placement. | R. V. Raj, N. S. Murty, P. S. Nagendra Rao, Lalit M. Patnaik |
| 1997 | Industrial Strength Formal Verification Techniques for Hardware Designs. | Sreeranga P. Rajan, Natarajan Shankar, Mandayam K. Srivas |
| 1997 | T4: Verification. | Rajesh Raina, Jacob A. Abraham, A. K. Pujari |
| 1997 | On Full Reset as a Design-For-Testability Technique. | Irith Pomeranz, Sudhakar M. Reddy |
| 1997 | On the Detection of Reset Faults in Synchronous Sequential Circuits. | Irith Pomeranz, Sudhakar M. Reddy |
| 1997 | The Design of A Digital IC for Thyristor Triggering. | Tales Cleber Pimenta, Luiz Lenarth Gabriel Vermaas, Paulo Csar Crepaldi, Robson L. Moreno |
| 1997 | A New Partitioning Strategy Based on Supermodular Functions. | Sachin B. Patkar, Shabbir H. Batterywala, M. Chandramouli, H. Narayanan |
| 1997 | Low-Power Driven Logic Synthesis Using Accurate Power Estimation Technique. | Priya Patil, Tan-Li Chou, Kaushik Roy, Rabindra Roy |
| 1997 | Behavioral Array Mapping into Multiport Memories Targeting Low Power. | Preeti Ranjan Panda, Nikil D. Dutt |
| 1997 | An Algorithm for Finding a Non-Trivial Lower Bound for Channel Routing. | Rajat Kumar Pal, Sudebkumar Prasant Pal, Ajit Pal |
| 1997 | Micropipeline Architecture for Multiplier-less FIR Filters. | Saeid Nooshabadi, Juan A. Montiel-Nelson, G. S. Visweswaran, D. Nagchoudhuri |