| 1995 | Comparison of the layout synthesis of radix-2 and pseudo-radix-4 dividers. | Alain Guyot, Luis A. Montalvo, A. Houelle, Habib Mehrez, Nicolas Vaucher |
| 1995 | A VLSI architecture for the computation of NURBS patches. | Meenakshisundaram Gopi, Swami Manohar |
| 1995 | Wave pipelined architecture folding: a method to achieve low power and low area. | Debabrata Ghosh, Soumitra Kumar Nandy |
| 1995 | Fast computation of MISR signatures. | Manoj Franklin, Kewal K. Saluja, Kyuchull Kim |
| 1995 | Efficient simulation of interconnect and mixed analog-digital circuits in ACES. | Anirudh Devgan, Ronald A. Rohrer |
| 1995 | The Pentium processor-90/100, microarchitecture and low power circuit design. | Goutam Debnath, Kathy Debnath, Roshan Fernando |
| 1995 | Parallel algorithms for single row routing in narrow streets. | Saibal Das, Sanjeev Saxena |
| 1995 | An improved output compaction technique for built-in self-test in VLSI circuits. | Sunil R. Das, H. T. Ho, Wen-Ben Jone, Amiya R. Nayak |
| 1995 | VLSI floorplan generation and area optimization using AND-OR graph search. | P. S. Dasgupta, Susmita Sur-Kolay, Bhargab B. Bhattacharya |
| 1995 | EM simulation [ICs and MCMs]. | D. V. Das |
| 1995 | Optimal algorithms for planar over-the-cell routing in the presence of obstacles. | Srinivasa R. Danda, Sreekrishna Madhwapathy, Naveed A. Sherwani |
| 1995 | An efficient switching network fault diagnosis for reconfigurable VLSI/WSI array processors. | Yung-Yuan Chen, Ching-Hwa Cheng, Jwu-E Chen |
| 1995 | Generation of search state equivalence for automatic test pattern generation. | Xinghao Chen, Michael L. Bushnell |
| 1995 | Technology mapping on a multi-output logic module built around Cellular Automata Array for a new FPGA architecture. | Santanu Chattopadhyay, Samir Roy, Parimal Pal Chaudhuri |
| 1995 | Board level fault diagnosis using cellular automata array. | Santanu Chattopadhyay, Dipanwita Roy Chowdhury, Subarna Bhattacharjee, Parimal Pal Chaudhuri |
| 1995 | Voting model based diagnosis of bridging faults in combinational circuits. | Sreejit Chakravarty, Yiming Gong |
| 1995 | Optimum retiming of large sequential circuits. | Srimat T. Chakradhar |
| 1995 | Robust testing for stuck-at faults. | Tapan J. Chakraborty, Vishwani D. Agrawal |
| 1995 | Analog gates for a VLSI fuzzy processor. | Vincenzo Catania, Marco Russo |
| 1995 | Transformations for functional verification of synthesized designs. | William L. Bradley, Ranga Vemuri |
| 1995 | Minimizing power consumption of static CMOS circuits by transistor sizing and input reordering. | Manjit Borah, Mary Jane Irwin, Robert Michael Owens |
| 1995 | A new switching-level approach to multiple-output functions synthesis. | Cristiana Bolchini, Giacomo Buonanno, Donatella Sciuto, Renato Stefanelli |
| 1995 | PLA based synthesis and testing of hazard free logic. | U. K. Bhattacharyya, Idranil Sen Gupta, S. Shyama Nath, P. Dutta |
| 1995 | Resource requirements for field programmable interconnection chips. | Dinesh Bhatia, James Haralambides |
| 1995 | Partial scan design for technology mapped circuits. | Arun Balakrishnan, Srimat T. Chakradhar |