| 1992 | An Effective Timing-Driven Placement Algorithm For Macro Cells. | Ching-Ting Wu, Andrew Lim, David H. C. Du |
| 1992 | Quasi-Linear FSMS and their Application to the Generation of Deterministic and Pseudo-random Test Vectors. | Lew Fock Chong Lew Yan Voon, Christian Dufaza, Christian Landrault |
| 1992 | Stepsize Control in Piecewise Approximate Circuit Simulation. | Chandu Visweswariah |
| 1992 | ECube: An Efficient Architecture for Analyzing Time-Varying Spectra. | Mohan Vishwanath, Robert Michael Owens, Mary Jane Irwin |
| 1992 | EPLDs - a Milestone in the World of Logic Design. | Uma. H. L. |
| 1992 | An Efficient Rule Based Fault Simulator. | Oommen Tharakan, James Jacob, Mandyam-Komar Srinivas |
| 1992 | A Verification Guide for the Perplexed Designer: Matching Verification Techniques and Design Tasks. | P. A. Subrahmanyam |
| 1992 | Field Programmable Gate Array (FPGA) Implementation of Digital Systems: An Alternative to ASIC. | Vason P. Srini |
| 1992 | Design Migration Across Technology - Making It Work. | Soumitra De Sirkar, Raghuram S. Tupuri, C. Sudha Madhuri, G. Rajagopalan, Kalpesh D. Mehta, C. G. Madhukar, Giridhar Bajpe |
| 1992 | Design Considerations for a Flat Panel Controller. | Mahesh Siddappa |
| 1992 | The "G-F" 2-Valued Formula Generating Complete Set of Tests to Multiple Faults. | Yunhuan Sheng, Shaoqing Li |
| 1992 | Design of an Efficient ASIC for the Control of Microwave Ovens. | Chandra Shekhar, A. S. Mandal |
| 1992 | DEFLAN- A delay estimator for floorplanner. | R. Shanker |
| 1992 | An Efficient Method for Computation of Signatures. | Chin-Foo See, Kewal K. Saluja |
| 1992 | Structured Construction of VLSI Circuits Using Adjacency Lists. | M. V. V. Satyanarayana |
| 1992 | A Low Overhead and High Coverage BIST Scheme for Dynamic CMOS PLAs. | Michel Renovell, M. Ildevert, Yves Bertrand |
| 1992 | Solving Physical Design Problems on a Vector Machine. | C. P. Ravikumar |
| 1992 | Computational Complexity of Test-Point Insertions and Decompositions. | Nageswara S. V. Rao, Shunichi Toida |
| 1992 | Using Dedicated Functional Simulator for ASIC Design in Indian Context. | K. V. S. H. Rao, Raj Singh, Chandra Shekhar |
| 1992 | Constrained Via Minimisation In Greedy Channel Routing. | K. R. Rao, K. S. Raghunathan |
| 1992 | An ASIC for High Performance Stepper Motor Control. | K. V. S. H. Rao, A. Kansal, Chandra Shekhar, M. Srinivas, V. N. S. N. Rao |
| 1992 | A Two-dimensional Systolic Array Processor for Image Processing. | N. Ranganathan, Minesh I. Patel, Patrick McCabe |
| 1992 | A CMOS VLSI Chip for Motion Detection. | N. Ranganathan, Rajiv Mehrotra, S. Kurji |
| 1992 | CPM Pole-Zero Computation Using The Generalized Eigenproblem Approach. | Ram Singh Rana, A. B. Bhattacharyya |
| 1992 | An Architecture To Test Random Access Memories. | Rochit Rajsuman |