| 2026 | A Two-Bit Error Correction Protocol for Low-Power Serial Communication in IoT Systems. | Om Maheshwari, Bikram Paul |
| 2026 | A Pipelined Probabilistic Computing Accelerator for Sparse Max-Cut with Parallel Updating p-Bits. | Kiran Magar, Utsav Banerjee |
| 2026 | LeakAnalyser: Uncertainty-Aware Analysis of Leakage Power in Digital Circuits Under PVT Variations. | Sarang Kudtarkar, Zia Abbas |
| 2026 | A Low-Supply, Sub-mW 1 GHz Ring Oscillator Achieving < 5% Frequency Variation Across PVT for Reliable On-Chip Clocking. | Vellanki Venkata Sundara Raghava Chetan Krishna, Busam Karthikeya, Santosh Yachareni, Saraswatula Sree Rama Krishna Chaithnya, Abhishek Srivastava |
| 2026 | A Robust CMOS Schmitt Trigger Architecture with Improved Noise Immunity and Hysteresis Control. | Siddharth R. K., Shasidhar Reddy, Cheni Deepankar, Karteek Dokala, Vasantha M. H., Nithin Kumar Y. B. |
| 2026 | Spike-Based Time-Domain ECG Wave Delineation for Low-Power VLSI Implementation. | Priya K, Binsu J. Kailath |
| 2026 | A Current Injection Based Constant-g | Mohammed Hammad Khan, Abhishek Srivastava, Saurabh Zope, Ishan Acharyya |
| 2026 | RAMAN: Resource-Efficient ApproxiMate Posit Processing for Algorithm-Hardware Co-DesigN. | Mohd Faisal Khan, Mukul Lokhande, Santosh Kumar Vishvakarma |
| 2026 | Security-aware Performance-Optimized Computation Offloading Under Near Memory Processing. | Simran Preet Kaur, Asutosh Kumar Sarma, Satanu Maity, Manojit Ghose |
| 2026 | A Low Noise CMOS Image Sensor with Column-Parallel Readout. | Amandeep Kaur, Mukul Sarkar |
| 2026 | A Fully Reconfigurable and Adaptable Current-Source Based Sense Amplifier for Energy Efficient in-Memory Computing. | Parminder Kaur, Charagundla Sai Laxman, Amandeep Kaur |
| 2026 | DIVIAC: Library of Input Data Aware Approximate Dividers with Partial Exact Minimization. | Chandan Kumar Jha, Sallar Ahmadi-Pour, Sajjad Parvin, Rolf Drechsler |
| 2026 | Energy Efficient Exact and Approximate Systolic Array Architecture for Matrix Multiplication. | Pragun Jaswal, L. Hemanth Krishna, B. Srinivasu |
| 2026 | BHARAT-TPM: Micro-Architecture Design of Scalable Hardware Random Number Generator for a RISC-V Trusted Platform Module. | Soumya G. Hosmani, Raja Sekar K, Aneesh Raveendran, Vivian Desalphine, Haribabu P, S. D. Sudarsan |
| 2026 | Design and Analysis of Fused SIM(S)D Functional Units for RISC-V P-and-B Extensions Instructions. | Nancy Gupta, David Selvakumar, Gopal Raut, Pranose J. Edavoor |
| 2026 | Energy and Performance Optimized Computation Offloading for Near-Memory Computing. | Apratim Goswami, Satanu Maity, Manojit Ghose |
| 2026 | A Forward-Backward Search Strategy for Falsification in Spiking Neural Networks. | Sruti Goswami, Ansuman Banerjee, Swarup Kumar Mohalik |
| 2026 | An Ultra-Low-Power IoT Sensor Network for Threshold-Based Environmental Monitoring. | Saiotrik Ghosh, Sujatro Sarkar, Maitree Basu, Joydeep Basu |
| 2026 | HazeClear: A Hardware-Accelerated ASIC for Real-Time Video Dehazing. | Avra Ghosh, Simontini Roy, Sayan Chattarjee, Sheli Sinha Chaudhuri |
| 2026 | A Capacitorless On-Chip LDO for Jitter Reduction in 7.2 Gbps HBM3E PHY Clock Network with Aging and Power Delivery Analysis. | Javed S. Gaggatur |
| 2026 | Mitigating Scan-Induced Vmin Failures Through Intelligent Test Optimization and Physical Design Improvements. | Ratnadeep Dutta, Manish Pundir |
| 2026 | A Novel Latch Reset Technique Enabling Sub-6w Operation in Double-Tail Comparator. | Aditya Dubey, Sunil Rathore, Navjeet Bagga |
| 2026 | CMOSP18 FD-SOI Technology-Based IO-Ring for Testing of High-Speed ADCs. | Manvi Dhawan, Anurup Mitra, Sathisha Seth K |
| 2026 | An Intelligent Digital Microfluidic Biochip System with GUI and Deep Learning-Based Automation. | Sanju De, Tamal Mandal, Sudip Roy |
| 2026 | A Novel Temperature and Aging Invariant Voltage Droop Monitor Architecture with 96.94% Accuracy. | Anup J. Deka, Shobhit Tyagi, Manoja D |