| 2017 | Formal Verification of Power Management Logic with Mixed-Signal Domains. | Sudipa Mandal, Antonio Anastasio Bruto da Costa, Aritra Hazra, Pallab Dasgupta, Bhushan Naware, Chunduri Rama Mohan, Sanjib Basu |
| 2017 | Characterization of a Novel 10T Low-Voltage SRAM Cell with High Read and Write Margin for 20nm FinFET Technology. | Mitesh Limachia, Pathik Viramgama, Rajesh Amratlal Thakker, Nikhil Kothari |
| 2017 | Virtual Two-Port Memory Architecture for Asymmetric Memory Technologies. | Jiayin Li, Kartik Mohanram |
| 2017 | Hybrid OPC Technique for Fast and Accurate Lithography Simulation. | Pardeep Kumar, S. Srivatsa, P. Mantripragada, S. Upreti, K. V. Shravya |
| 2017 | A Sub-0.5V Reliability Aware-Negative Bitline Write-Assisted 8T DP-SRAM and WL Strapping Novel Architecture to Counter Dual Patterning Issues in 10nm FinFET. | Vinay Kumar, Nikhil Puri, Sudhir Kumar, Sumit Srivastav |
| 2017 | A Methodology for Trace Signal Selection to Improve Error Detection in Post-Silicon Validation. | Binod Kumar, Ankit Jindal, Virendra Singh, Masahiro Fujita |
| 2017 | A Low Power Multi-channel Input Delta-Sigma ADC without Reset. | Ashwin Kumar Siva Kumar, Debasish Behera, Nagendra Krishnapura |
| 2017 | Improved NCV Gate Realization of Arbitrary Size Toffoli Gates. | Abhoy Kole, Kamalika Datta |
| 2017 | Low Complexity and Critical Path Based VLSI Architecture for LMS Adaptive Filter Using Distributed Arithmetic. | Mohd. Tasleem Khan, Shaik Rafi Ahamed, Forrest Brewer |
| 2017 | MAVI: An Embedded Device to Assist Mobility of Visually Impaired. | Rajesh Kedia, K. K. Yoosuf, Pappireddy Dedeepya, Munib Fazal, Chetan Arora, M. Balakrishnan |
| 2017 | A New Logic Encryption Strategy Ensuring Key Interdependency. | Rajit Karmakar, N. Prasad, Santanu Chattopadhyay, Rohit Kapur, Indranil Sengupta |
| 2017 | A Clock Retiming Circuit for Repeaterless Low Swing On-Chip Interconnects. | Naveen Kadayinti, Maryam Shojaei Baghini, Dinesh Kumar Sharma |
| 2017 | Optimization of 2.4 GHz CMOS Low Noise Amplifier Using Hybrid Particle Swarm Optimization with Lvy Flight. | Deepak Joshi, Satyabrata Dash, Ayush Malhotra, Pulimi Venkata Sai, Rahul Das, Dikshit Sharma, Gaurav Trivedi |
| 2017 | An FPGA Based High throughput Discrete Kalman Filter Architecture for Real-Time Image Denoising. | Bibin Johnson, Nimin Thomas, J. Sheeba Rani |
| 2017 | NORA: Algorithmic Balancing without Pre-charge to Thwart Power Analysis Attacks. | Darshana Jayasinghe, Aleksandar Ignjatovic, Sri Parameswaran |
| 2017 | Within-Die Threshold Voltage Variability Estimation Using Reconfigurable Ring Oscillator. | Poorvi Jain, Bishnu Prasad Das |
| 2017 | On Testing of Superscalar Processors in Functional Mode for Delay Faults. | Nihar Hage, Rohini Gulve, Masahiro Fujita, Virendra Singh |
| 2017 | Suppressing Single Transistor Latch Effect in Energy Efficient Steep Switching Junctionless MOSFETs. | Manish Gupta, Abhinav Kranti |
| 2017 | Self Aware SoC Security to Counteract Delay Inducing Hardware Trojans at Runtime. | Krishnendu Guha, Debasri Saha, Amlan Chakrabarti |
| 2017 | A Switched-Capacitor Amplifier with True Rail-to-Rail Input Range without Using a Rail-to-Rail Op-Amp. | Anjali Gopinath, Ravi Kumar Adusumalli, Veeresh Babu Vulligaddala, M. B. Srinivas |
| 2017 | On-Chip Non-intrusive Temperature Detection and Compensation of a Fully Integrated CMOS RF Power Amplifier. | Javed S. Gaggatur, Immanuel Raja, Gaurab Banerjee |
| 2017 | High Gain Capacitance Sensor Interface for the Monitoring of Cell Volume Growth. | Javed S. Gaggatur, Gaurab Banerjee |
| 2017 | Markov Chain Model Using Lvy Flight for VLSI Power Grid Analysis. | Sukanta Dey, Satyabrata Dash, Sukumar Nandi, Gaurav Trivedi |
| 2017 | Modeling of Body-Bias Dependence of Overlap Capacitances in Bulk MOSFETs. | Avirup Dasgupta, Chetan Gupta, Anupam Dutta, Yen-Kai Lin, Srikanth Srihari, Ethirajan Tamilmani, Chenming Hu, Yogesh Singh Chauhan |
| 2017 | Generating AMS Behavioral Models with Formal Guarantees on Feature Accuracy. | Antonio Anastasio Bruto da Costa, Pallab Dasgupta |