| 2017 | Towards Controlling Chip Temperature by Dynamic Cache Reconfiguration in Multiprocessors. | Shounak Chakraborty, Hemangee K. Kapoor |
| 2017 | Design of Coherence Verification Unit for Heterogeneous CMPs Integrating Update and Invalidate Protocols. | Bidesh Chakraborty, Mamata Dalui, Biplab K. Sikdar |
| 2017 | A Novel Approach towards Biochemical Synthesis on Cyberphysical Digital Microfluidic Biochip. | Sarit Chakraborty, Susanta Chakraborty |
| 2017 | Improved Path Recovery in Pseudo Functional Path Delay Test Using Extended Value Algebra. | Prasenjit Biswas, D. M. H. Walker |
| 2017 | Extraction and Analysis of Mobility in Double Gate Junctionless Transistor. | Y. V. Bhuvaneshwari, Abhinav Kranti |
| 2017 | Efficient Binary Basic Linear Algebra Operations on ReRAM Crossbar Arrays. | Debjyoti Bhattacharjee, Anupam Chattopadhyay |
| 2017 | High Performance Integer DCT Architectures for HEVC. | Mohamed Asan Basiri M., Sk. Noor Mahammad |
| 2017 | Hardware Software Codesign for a Hybrid Substitution Box. | K. B. Anuroop, Anu James, M. Neema |
| 2017 | Compact Implementations of FPGA-based PUFs with Enhanced Performance. | N. Nalla Anandakumar, Mohammad S. Hashmi, Somitra Kumar Sanadhya |
| 2017 | Feature Based Identification of Transmission Line Faults by Synchronous Monitoring of PMUs. | Antara Ain, Akshay Mambakam, Pallab Dasgupta, Siddhartha Mukhopadhyay |
| 2017 | Towards a Better Lifetime for Non-volatile Caches in Chip Multiprocessors. | Sukarn Agarwal, Hemangee K. Kapoor |
| 2016 | A Power Efficient Dual Link Mesh NoC Architecture to Support Nonuniform Traffic Arbitration at Routing Logic. | Sonal Yadav, Vijay Laxmi, Manoj Singh Gaur |
| 2016 | Unified Model for Sub-Bandgap and Conventional Impact Ionization in RF SOI MOSFETs with Improved Simulator Convergence. | Chandan Yadav, Anupam Dutta, Saurabh Sirohi, Ethirajan Tamilmani, Yogesh Singh Chauhan |
| 2016 | ILP-based Synthesis for Sample Preparation Applications on Digital Microfluidic Biochips. | Abhimanyu Yadav, Trung Anh Dinh, Daiki Kitagawa, Shigeru Yamashita |
| 2016 | Analysis of Quantum Capacitance Effect in Ultra-Thin-Body III-V Transistor. | Chandan Yadav, Amit Agarwal, Yogesh Singh Chauhan |
| 2016 | A 0.5-4GHz Programmable-Bandwidth Fractional-N PLL for Multi-protocol SERDES in 28nm CMOS. | Jayesh Wadekar, Biman Chattopadhyay, Ravi Mehta, Gopalkrishna Nayak |
| 2016 | An Efficient Method for Clock Skew Scheduling to Reduce Peak Current. | Arunkumar Vijayakumar, Vinay C. Patil, Sandip Kundu |
| 2016 | Embedded Security. | Ingrid Verbauwhede, Debdeep Mukhopadhyay, Sujoy Sinha Roy |
| 2016 | Database Search and ATPG - Interdisciplinary Domains and Algorithms. | Muralidharan Venkatasubramanian, Vishwani D. Agrawal |
| 2016 | Characterization of a Novel Low Leakage Power and Area Efficient 7T SRAM Cell. | A. Venkatareddy, Sithara Raveendran, Kumar Y. B. Nithin, M. H. Vasantha |
| 2016 | Approximate Computing. | Swagath Venkataramani, Kaushik Roy, Anand Raghunathan |
| 2016 | Massed Refresh: An Energy-Efficient Technique to Reduce Refresh Overhead in Hybrid Memory Cube Architectures. | Ishan G. Thakkar, Sudeep Pasricha |
| 2016 | New Directions in Hardware Security. | Mark Tehranipoor |
| 2016 | Logic Synthesis in Reversible PLA. | Nazma Tara, Hafiz Md. Hasan Babu, Nawshi Matin |
| 2016 | E3R: Energy Efficient Error Recovery for Multi/Triple-Level Cell Non-volatile Memories. | Shivam Swami, Kartik Mohanram |