| 2016 | Error Resilient Secure Multi-gigabit Optical Link Design for High Energy Physics Experiment. | Jubin Mitra, Shuaib Ahmad Khan, Rourab Paul, Sanjoy Mukherjee, Amlan Chakrabarti, Tapan Kumar Nayak |
| 2016 | A Statistical Model for Hybrid Wireless Network on Chip. | Priyanka Mitra |
| 2016 | Design and Simulation of Microfluidic Components towards Development of a Controlled Drug Delivery Platform. | Richa Mishra, Tarun Kanti Bhattacharyya, Tapas Kumar Maiti |
| 2016 | Achieving Efficient QR Factorization by Algorithm-Architecture Co-design of Householder Transformation. | Farhad Merchant, Tarun Vatwani, Anupam Chattopadhyay, Soumyendu Raha, S. K. Nandy, Ranjani Narayan |
| 2016 | Efficient Realization of Table Look-Up Based Double Precision Floating Point Arithmetic. | Farhad Merchant, Nimash Choudhary, S. K. Nandy, Ranjani Narayan |
| 2016 | Analyzing the Impact of SEUs on SRAMs with Resistive-Bridge Defects. | Guilherme Cardoso Medeiros, Letcia Maria Bolzani Phls, Fabian Vargas |
| 2016 | A 12.5 Gbps One-Fifth Rate CDR Incorporating a Novel Sampler Based Phase Detector and a DFE. | Pragya Maheshwari, Suhas Kaushik, Mahendra Sakare, Shalabh Gupta |
| 2016 | VOP: Architecture of a Processor for Vector Operations in On-Line Learning of Neural Networks. | Gopinath Mahale, Soumitra Kumar Nandy, Eshan Bhatia, S. K. Nandy, Ranjani Narayan |
| 2016 | Fault Tolerance through Invariant Checking for Iterative Solvers. | Felix Loh, Kewal K. Saluja, Parameswaran Ramanathan |
| 2016 | A Wide-Band Receiver Front-End with Programmable Frequency Selective Input Matching. | Manas Kumar Lenka, Akash Agrawal, Vishal Khatri, Gaurab Banerjee |
| 2016 | Path Based Timing Validation for Timed Asynchronous Design. | William Lee, Tannu Sharma, Kenneth S. Stevens |
| 2016 | A Digitally Assisted Radiation Hardened Current Steering DAC. | Abishek Thekkeyil Kunnath, Bibhudatta Sahoo |
| 2016 | Efficient Error-Detection and Recovery Mechanisms for Reliability and Resiliency of Multicores. | Sandip Kundu, Omer Khan |
| 2016 | A 0.5V VMIN 6T SRAM in 28nm UTBB FDSOI Technology Using Compensated WLUD Scheme with Zero Performance Loss. | Ashish Kumar, G. S. Visweswaran, Vinay Kumar, Kaushik Saha |
| 2016 | Design and Implementation of Low-Power Digital Baseband Transceivers for IEEE802.15.6 Standard. | Manchi Pavan Kumar, Roy Paily, Anup Kumar Gogoi |
| 2016 | Relaxation Based Circuit Simulation Acceleration over CPU-FPGA. | Vinay B. Y. Kumar, Kulshreshth Dhiman, Mandar Datar, Akash Pacharne, H. Narayanan, Sachin B. Patkar |
| 2016 | A Novel EPE Aware Hybrid Global Route Planner after Floorplanning. | Bapi Kar, Susmita Sur-Kolay, Chittaranjan A. Mandal |
| 2016 | Thermal-Safe Schedule Generation for System-on-Chip Testing. | Rajit Karmakar, Santanu Chattopadhyay |
| 2016 | FPGA-based Design of a Hearing Aid with Frequency Response Selection through Audio Input. | Shankarayya G. Kambalimath, Prem C. Pandey, Pandurangarao N. Kulkarni, Shivaling S. Mahant-Shetti, Sangamesh G. Hiremath |
| 2016 | BRAIN: BehavioR Based Adaptive Intrusion Detection in Networks: Using Hardware Performance Counters to Detect DDoS Attacks. | Vinayaka Jyothi, Xueyang Wang, Sateesh Addepalli, Ramesh Karri |
| 2016 | Energy-Aware Memory Mapping for Hybrid FRAM-SRAM MCUs in IoT Edge Devices. | Hrishikesh Jayakumar, Arnab Raha, Vijay Raghunathan |
| 2016 | Design of Microfluidic Biochips: Connecting Algorithms and Foundations of Chip Design to Biochemistry and the Life Sciences. | Tsung-Yi Ho, Shigeru Yamashita, Ansuman Banerjee, Sudip Roy |
| 2016 | An Improved Design of a Reversible Fault Tolerant LUT-based FPGA. | Mubin Ul Haque, Zarrin Tasnim Sworna, Hafiz Md. Hasan Babu |
| 2016 | A Fully-Integrated Radio-Frequency Power Amplifier in 28nm CMOS Technology Mounted in BGA Package. | Ankur Gupta, Mayank Shrivastava, Maryam Shojaei Baghini, Harald Gossner, V. Ramgopal Rao |
| 2016 | Write Assist Scheme to Enhance SRAM Cell Reliability Using Voltage Sensing Technique. | Rajat Gupta, Vijit Gadi, H. Anirudh Upendar |