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International Conference on VLSI Design

VLSID

National

CORE rank

CORE rank (raw)

National: India

Fields of research

Distributed Computing and Systems Software

Papers indexed

3,530

1992–2026

Papers per year

1992175 peak2026

VLSID papers

3,530 records sourced from DBLP. Search titles, filter by year, sort by recency.

YearTitleAuthors
2014Design of Dedicated Reversible Quantum Circuitry for Square Computation.H. V. Jayashree, Himanshu Thapliyal, Vinod Kumar Agrawal
2014QUICKRECALL: A Low Overhead HW/SW Approach for Enabling Computations across Power Cycles in Transiently Powered Computers.Hrishikesh Jayakumar, Arnab Raha, Vijay Raghunathan
2014Formal Verification and Debugging of Array Dividers with Auto-correction Mechanism.M. H. Haghbayan, Bijan Alizadeh, Payman Behnam, Saeed Safari
2014Tutorial T1: Ambient Intelligence through Internets-of-Things - An Application Development Approach.Anil Kumar Gupta, Anand Singh, Vineeta Yadav
2014A Power Efficient Fully Differential Back Terminated Current-Mode HDMI Source.R. Gopikrishnan, Vijaya Sankara Rao Pasupureddi, Govindarajulu Regeti
2014Trimless, PVT Insensitive Voltage Reference Using Compensation of Beta and Thermal Voltage.Hande Vinayak Gopal, Maryam Shojaei Baghini
2014Tutorial T6B: Embedded Memory Design for Future Technologies: Challenges and Solutions.Swaroop Ghosh
2014Embedded Complex Floating Point Hardware Accelerator.Amin Ghasemazar, Mehran Goli, Ali Afzali-Kusha
2014ProCA: Progressive Configuration Aware Design Methodology for Low Power Stochastic ASICs.Neel Gala, V. R. Devanathan, Karthik Srinivasan, V. Visvanathan, V. Kamakoti
2014Challenges in Implementing Cache-Based Side Channel Attacks on Modern Processors.Jyoti Gajrani, Pooja Mazumdar, Sampreet A. Sharma, Bernard Menezes
2014BSIM6 - Benchmarking the Next-Generation MOSFET Model for RF Applications.Anupam Dutta, Saurabh Sirohi, Ethirajan Tamilmani, Harshit Agarwal, Yogesh Singh Chauhan, Richard Q. Williams
2014A 500 mV to 1.0 V 128 Kb SRAM in Sub 20 nm Bulk-FinFET Using Auto-adjustable Write Assist.Prashant Dubey, Gaurav Ahuja, Vaibhav Verma, Sanjay Kumar Yadav, Amit Khanuja
2014Debug Automation for Synchronization Bugs at RTL.Mehdi Dehbashi, Grschwin Fey
2014Tutorial T2B: Cost / Application / Time to Market Driven SoC Design and Manufacturing Strategy.Barun Kumar De, Anupam Chattopadhyay, Ansuman Banerjee
2014All Optical Reversible Multiplexer Design Using Mach-Zehnder Interferometer.Kamalika Datta, Indranil Sengupta
2014Hardware Efficient VLSI Architecture for 3-D Discrete Wavelet Transform.Anand D. Darji, Saurabh Shukla, S. N. Merchant, Arun N. Chandorkar
2014SAT-Based Test Pattern Generation with Improved Dynamic Compaction.Alexander Czutro, Sudhakar M. Reddy, Ilia Polian, Bernd Becker
2014Efficient Two-Phase Approaches for Branch-and-Bound Style Resource Constrained Scheduling.Mingsong Chen, Fan Gu, Lei Zhou, Geguang Pu, Xiao Liu
2014Improvements to Negative-C Compensation Based Amplifiers for Broadband Applications.Rajesh Cheeranthodi, Santhosh Madhavan, Umesh K. Shukla, Giri Rangan
2014FinFET Logic Circuit Optimization with Different FinFET Styles: Lower Power Possible at Higher Supply Voltage.Sourindra Chaudhuri, Niraj K. Jha
2014Tutorial T7A: Techniques for Network-on-Chip (NoC) Design and Test.Santanu Chattopadhyay
2014Tutorial T5: Microfluidic Biochips: Connecting VLSI and Embedded Systems to the Life Sciences.Krishnendu Chakrabarty, Tsung-Yi Ho
2014Techniques to Improve the Efficiency of SAT Based Path Delay Test Generation.Kun Bian, D. M. H. Walker, Sunil P. Khatri
2014Correctness Checking of Bio-chemical Protocol Realizations on a Digital Microfluidic Biochip.Sukanta Bhattacharjee, Ansuman Banerjee, Krishnendu Chakrabarty, Bhargab B. Bhattacharya
2014Minimizing Power and Skew in VLSI-SoC Clocking with Pulsed Resonance Driven De-skewing Latches.Ignatius Bezzam, Shoba Krishnan
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