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International Conference on VLSI Design

VLSID

National

CORE rank

CORE rank (raw)

National: India

Fields of research

Distributed Computing and Systems Software

Papers indexed

3,530

1992–2026

Papers per year

1992175 peak2026

VLSID papers

3,530 records sourced from DBLP. Search titles, filter by year, sort by recency.

YearTitleAuthors
2011Ensuring On-Die Power Supply Robustness in High-Performance Designs.Sreekanth Soman, Amit Brahme, Ramakrishnan Venkatraman, Raashid Shaikh, Santhosh Thiyagaraja, Mahendrasing Patil
2011Improved Timing Windows Overlap Check Using Statistical Timing Analysis.Sachin Shrivastava, Harindranath Parameswaran
2011Dual Code Compression for Embedded Systems.Kartik Shrivastava, Prabhat Mishra
2011A New Double Data Rate(DDR) Dual-Mode Duobinary Transmitter Architecture.Mrigank Sharad, Vijaya Sankara Rao Pasupureddi, Pradip Mandal
2011Layout-Aware Solution Preparation for Biochemical Analysis on a Digital Microfluidic Biochip.Sudip Roy, Bhargab B. Bhattacharya, Partha Pratim Chakrabarti, Krishnendu Chakrabarty
2011Cell Library Characterization at Low Voltage Using Non-linear Operating Point Analysis of Local Variations.Rahul Rithe, Sharon Chou, Jie Gu, Alice Wang, Satyendra Datla, Gordon Gammie, Dennis Buss, Anantha P. Chandrakasan
2011An Approach to Tolerate Process Related Variations in Memristor-Based Applications.Jeyavijayan Rajendran, Harika Manem, Ramesh Karri, Garrett S. Rose
2011Trace Buffer-Based Silicon Debug with Lossless Compression.Sandesh Prabhakar, Rajamani Sethuram, Michael S. Hsiao
2011Modeling the Effect of Gate Fringing and Dopant Redistribution on the Inverse Narrow Width Effect of Narrow Channel Shallow Trench Isolated MOSFETs.Srabanti Pandit, Chandan Kumar Sarkar
2011Performance Comparison of Thin-Film Transistors Fabricated Using Different Purity Semiconducting Nanotubes.K. C. Narasimhamurthy, Roy P. Paily
2011Auxiliary State Machines and Auxiliary Functions: Constructs for Extending AMS Assertions.Subhankar Mukherjee, Pallab Dasgupta
2011Path Delay Tuning for Performance Gain in the Face of Random Manufacturing Variations.Kautalya Mishra, Ahmed Faraz, Adit D. Singh
2011Realizing Cycle Accurate Processor Memory Simulation via Interface Abstraction.Su Myat Min, Jorgen Peddersen, Sri Parameswaran
2011A Methodology for Automatic Transistor-Level Sizing of CMOS OpAmps.Praveen K. Meduri, Shirshak K. Dhali
2011Hardware Implementation of Real-Time Speech Recognition System Using TMS320C6713 DSP.J. Manikandan, B. Venkataramani, K. Girish, H. Karthic, V. Siddharth
2011Statistical Simulation and Modeling of Nano-scale CMOS VCO Using Artificial Neural Network.Sipra Mandal, Soumya Pandit
2011Interconnected Tile Standing Wave Resonant Oscillator Based Clock Distribution Circuits.Ayan Mandal, Vinay Karkala, Sunil P. Khatri, Rabi N. Mahapatra
2011An Automated Approach for Minimum Jitter Buffered H-Tree Construction.Ayan Mandal, Nikhil Jayakumar, Kalyana C. Bollapalli, Sunil P. Khatri, Rabi N. Mahapatra
2011A Library Development Framework for a Coarse Grain Reconfigurable Architecture.Omer Malik, Ahmed Hemani, Muhammad Ali Shami
2011Design of a 20 MHz DC-DC Buck Converter with 84 Percent Efficiency for Portable Applications.Ashis Maity, Amit Patra, Norihisa Yamamura, Jonathan Knight
2011AcENoCs: A Configurable HW/SW Platform for FPGA Accelerated NoC Emulation.Swapnil Lotlikar, Vinayak Pai, Paul V. Gratz
2011A Reconfigurable Processor for Phylogenetic Inference.Pei Liu, Ahmed Hemani, Kolin Paul
2011Improving Android Performance and Energy Efficiency.Tapas Kumar Kundu, Kolin Paul
2011Multiple Fault Diagnosis Based on Multiple Fault Simulation Using Particle Swarm Optimization.Subhadip Kundu, Santanu Chattopadhyay, Indranil Sengupta, Rohit Kapur
2011VaROT: Methodology for Variation-Tolerant DSP Hardware Design Using Post-Silicon Truncation of Operand Width.Keerthi Kunaparaju, Seetharam Narasimhan, Swarup Bhunia
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