| 2011 | Intra-Flit Skew Reduction for Asynchronous Bypass Channel in NoCs. | Reeshav Kumar, Yoon Seok Yang, Gwan Choi |
| 2011 | Variation-Conscious Formal Timing Verification in RTL. | Jayanand Asok Kumar, Shobha Vasudevan |
| 2011 | Extraction of Aspect Ratio for Non-Manhattan CMOS Devices. | Shiv Kumar, Vinay Bhaskar Chandratre, Sudheer K. Mohammed, C. K. Pithawa |
| 2011 | Trading Accuracy for Power with an Underdesigned Multiplier Architecture. | Parag Kulkarni, Puneet Gupta, Milos D. Ercegovac |
| 2011 | True Minimum Energy Design Using Dual Below-Threshold Supply Voltages. | Kyungseok Kim, Vishwani D. Agrawal |
| 2011 | 42Gbps Source-Synchronous Transmitter in 45nm CMOS. | Anant S. Kamath, Vikas Sinha, Sujoy Chakravarty |
| 2011 | Multi-CoDec Configurations for Low Power and High Quality Scan Test. | Arvind Jain, Sundarrajan Subramanian, Rubin A. Parekhji, Srivaths Ravi |
| 2011 | LA-LRU: A Latency-Aware Replacement Policy for Variation Tolerant Caches. | Aarul Jain, Aviral Shrivastava, Chaitali Chakrabarti |
| 2011 | Accurate Estimation of Signal Currents for Reliability Analysis Considering Advanced Waveform-Shape Effects. | Palkesh Jain, Ankit Jain |
| 2011 | Automated Physical Design of Microchip-Based Capillary Electrophoresis Systems. | Yi-Ling Hsieh, Tsung-Yi Ho |
| 2011 | MEMS-Based Power Gating for Highly Scalable Periodic and Event-Driven Processing. | Michael B. Henry, Robert Lyerly, Leyla Nazhandali, Adam Fruehling, Dimitrios Peroulis |
| 2011 | A SOI EEPROM Based Configuration Cell with Simple Scrubbing Detection. | Kashfia Haque, Paul Beckett |
| 2011 | A GPU Algorithm for IC Floorplanning: Specification, Analysis and Optimization. | Yiding Han, Koushik Chakraborty, Sanghamitra Roy, Vilasita Kuntamukkala |
| 2011 | A SPICE Macromodel for the Analysis of Lossy Dispersive Coupled GaAs Interconnect Line System. | Bhaskar Gopalan |
| 2011 | Evolution of Oscillation in a Quadrature Oscillator. | Diptendu Ghosh, Ranjit Gharpurey |
| 2011 | A Highly Stable Leakage-Based Silicon Physical Unclonable Functions. | Dinesh Ganta, Vignesh Vivekraja, Kanu Priya, Leyla Nazhandali |
| 2011 | Power Scalable Digital Baseband Architecture for IEEE 802.15.4. | Satyam Dwivedi, Bharadwaj Amrutur, Navakanta Bhat |
| 2011 | Low Offset, Low Noise, Variable Gain Interfacing Circuit with a Novel Scheme for Sensor Sensitivity and Offset Compensation for MEMS Based, Wheatstone Bridge Type, Resistive Smart Sensor. | Anupam Dutta, T. K. Bhattacharyya |
| 2011 | Wakeup Time and Wakeup Energy Estimation in Power-Gated Logic Clusters. | Vivek D. Tovinakere, Olivier Sentieys, Steven Derrien |
| 2011 | Hazard-Aware Directed Transition Fault ATPG for Effective Critical Path Test. | V. R. Devanathan, Ishaan Santhosh Shah |
| 2011 | Quadrature Error Compensation for Jitter Reduction in High Speed Clock and Data Recovery Circuits. | Kunal Desai, Vijay Krishna |
| 2011 | Pseudo Concurrent Quad-Band LNA Operating in 900 MHz/1.8 GHz and 900 MHz/2.4 GHz Bands for Multi-standard Wireless Receiver. | Sambit Datta, Ashudeb Dutta, Kunal Datta, Tarun Kanti Bhattacharyya |
| 2011 | A Low-Noise Low-Power Noise-Adaptive Neural Amplifier in 0.13um CMOS Technology. | Vikram Chaturvedi, Bharadwaj Amrutur |
| 2011 | A 1.8GHz Digital PLL in 65nm CMOS. | Biman Chattopadhyay, Anant S. Kamath, Gopalkrishna Nayak |
| 2011 | Fault Collapsing Using a Novel Extensibility Relation. | Maheshwar Chandrasekar, Michael S. Hsiao |