| 2025 | A 0.27-THz Frequency Multiplier Chain Using Harmonic Mixing with Multiplication of 18 in 65-nm CMOS. | Bollam Shiva Prasad, Mahima Arrawatia |
| 2025 | Advancing Functional Safety: Improving Failure Mode Analysis and Fault Injection Using Automation and GNN Algorithms. | Amurt Prakash, Abhijeet Singh, Pooja Madhusoodhanan, Padma Arvind, Viswanathan Pillai Prasanth, Sanjay Das, Kanad Basu |
| 2025 | HyCMAx: Power-Efficient Hybrid CMOS-Memristor Based Approximate Dividers for Error-Resilient Applications. | Monika Pokharia, Het Trivedi, Siddharth Doshi, Ravi S. Hegde, Joycee Mekie |
| 2025 | QuaLITi: Quantum Machine Learning Hardware Selection for Inferencing with Top-Tier Performance. | Koustubh Phalak, Swaroop Ghosh |
| 2025 | An Efficient RISC-V Vector Coprocessor for Heart Rate Variability Detection on Edge. | Uday Kiran Pedada, Tarun Sharma, Deepank Grover, Sujay Deb |
| 2025 | Serialized Control Interface ASIC for Distributed Controllers of Space-Borne RADAR. | Chiragkumar B. Patel, Ajay Kumar Singh, Himanshu N. Patel, B. Saravana Kumar |
| 2025 | True-PolyTronik: Securing Circuits Against Laser Logic State Imaging Attack Using RFET. | Sajjad Parvin, Chandan Kumar Jha, Frank Sill Torres, Rolf Drechsler |
| 2025 | A Study on the Impact of Temperature-Dependent Ferroelectric Switching Behavior in 3D Memory Architecture. | Varun Darshana Parekh, Yi Xiao, Yixin Xu, Zijian Zhao, Zhouhang Jiang, Rudra Biswas, Sumitha George, Kai Ni, Vijaykrishnan Narayanan |
| 2025 | Enhancing Digital Microfluidic Biochip Operations with Scheduling Interval Method. | Nirmala N, D. Gracia Nirmala Rani |
| 2025 | 2D Thermal Contour Modeling of 14 nm SOI FinFET Using Machine Learning for Efficient Thermal Profile Prediction. | Banit Negi, Muthusamy Hariharan, Vivek Kumar |
| 2025 | An Ensemble MLP-RF Model for the Prediction of DG-MOSFETs: Addressing Fabrication Process Variations. | Vaikunth Muthuraman, Khushwant Sehra, Vandana Kumari, Manoj Saxena |
| 2025 | DNA-CIM: DNA Sequence Analysis Using RRAM-Based Compute In-Memory Accelerator. | J. Chithambara Moorthii, Anmol Singla, Manan Suri |
| 2025 | Accelerating U-Net: A Patchwise Memory Optimization Approach for Image Segmentation. | Chaitanya Modiboyina, Syam Babu Gundumilli, Soumya Kanti Ghosh, Indrajit Chakrabarti |
| 2025 | Novel Hardware Architectures for PRESENT Block Cipher and its FPGA Realizations. | Ruby Mishra, Manish Okade, Kamalakanta Mahapatra |
| 2025 | A 0.5pJ/bit 7.2Gbps HBM3 PHY on Intel4 with EMIB Packaging and Unmatched Receiver Architecture on PHY Side with Per Bit Deskew Correction. | Aakash Hasmukhray Mehta, Javed S. Gaggatur, Mohammad M. Rashid, Sampath Dakshinamurthy, Aruna Kumar Lakya Srinivasamurthy, Anil Kumar Goyal, Subbarao Manam, Harshit Gupta, Sandeep Sukumar, Vipin K. Mishra, Koushik N. S, Santosh Nekkanti, Sambaran Mitra, Pooja K. Jadhav, Miryala Chandra Shekar, Dudekula Humayun, Michael C. Rifani, Jianyong Xie, Andrew P. Collins |
| 2025 | CRIS-b: A High-Speed Unified Modulo Reduction Algorithm and Hardware Architecture for CRYSTALS-Kyber. | Alip Majumdar, Rahul Shrestha |
| 2025 | hbcLock: Encrypted RF Communication Utilizing Body-Coupled Keys for the Internet of Bodies. | Soumick Majumdar, Anshul Madurwar, Anmol Shetty, Kurian Polachan |
| 2025 | Codesign for Broadcast Addressing Biochip Towards Tamper-Resistance and Enhanced Reliability. | Ritwika Majumdar, Piyali Datta, Arpan Chakraborty, Rajat Kumar Pal |
| 2025 | Unguided Machine Learning-Based Computation Offloading for Near-Memory Processing. | Satanu Maity, Manojit Ghose, Avinash Kumar, Anol Chakraborty, Ankit Chakraborty |
| 2025 | A First-Principles-Based Comparative Study Between Pristine and Au-Modified Graphene Nanosheet Towards Acetaldehyde Sensing Performance. | Indranil Maity, Soubarno Chatterjee, Souvik Bhanja |
| 2025 | TCAD Based Study of String Current Variability in 3D NAND Flash Memory. | Mrinmoy Mahapatra, Prathamesh Ganesh Kekarjawlekar, Akshay K. |
| 2025 | A Tug-of-War Between Static and Dynamic Memory in Intel SGX. | Sandeep Kumar, Abhisek Panda, Advait Nerlikar, Smruti R. Sarangi |
| 2025 | Leveraging Dual Output LUTs with Pipelining for Efficient BCD to Binary Converter on FPGA. | Santosh Kumar, Ayan Palchaudhuri |
| 2025 | Reliable High-Performance Programmable Voltage Regulator with 0.55A Sink Current for Cryo-Cooler Electronics in 0.18μm HV-CMOS Technology. | Nishant Kumar, Hari Shanker Gupta, Nihar Ranjan Mohapatra |
| 2025 | A Constructive High-Speed Crypto-mining Approach with Dual SHA-256 on an FPGA. | Velamala Pavan Kumar, Aravindhan Alagarsamy |