| 2020 | IOLTS | Industrial Practices in Low-Power Robust Design. | C. P. Ravikumar |
| 2008 | DATE | Test Strategies for Low Power Devices. | C. P. Ravikumar, Mokhtar Hirech, Xiaoqing Wen |
| 2008 | VLSID | Memory Yield Improvement through Multiple Test Sequences and Application-Aware Fault Models. | Aman Kokrady, C. P. Ravikumar, Nitin Chandrachoodan |
| 2008 | VLSID | Memory Architecture Exploration Framework for Cache Based Embedded SOC. | T. S. Rajesh Kumar, C. P. Ravikumar, R. Govindarajan |
| 2007 | ASPDAC | MODLEX: A Multi Objective Data Layout EXploration Framework for Embedded Systems-on-Chip. | T. S. Rajesh Kumar, C. P. Ravikumar, R. Govindarajan |
| 2007 | DATE | Interactive presentation: On power-profiling and pattern generation for power-safe scan tests. | V. R. Devanathan, C. P. Ravikumar, V. Kamakoti |
| 2007 | ITC | A stochastic pattern generation and optimization framework for variation-tolerant, power-safe scan test. | V. R. Devanathan, C. P. Ravikumar, V. Kamakoti |
| 2007 | ITC | PMScan : A power-managed scan for simultaneous reduction of dynamic and leakage power during scan test. | V. R. Devanathan, C. P. Ravikumar, Rajat Mehrotra, V. Kamakoti |
| 2007 | VLSID | Reducing SoC Test Time and Test Power in Hierarchical Scan Test : Scan Architecture and Algorithms. | V. R. Devanathan, C. P. Ravikumar, V. Kamakoti |
| 2007 | VLSID | MAX: A Multi Objective Memory Architecture eXploration Framework for Embedded Systems-on-Chip. | T. S. Rajesh Kumar, C. P. Ravikumar, R. Govindarajan |
| 2007 | VTS | Glitch-Aware Pattern Generation and Optimization Framework for Power-Safe Scan Test. | V. R. Devanathan, C. P. Ravikumar, V. Kamakoti |
| 2005 | ITC | Enhanced launch-off-capture transition fault testing. | Nisar Ahmed, Mohammad Tehranipoor, C. P. Ravikumar |
| 2005 | ITC | A low power and low cost scan test architecture for multi-clock domain SoCs using virtual divide and conquer. | Arasu T. Senthil, C. P. Ravikumar, Soumitra Kumar Nandy |
| 2005 | VLSID | A Framework for Distributed and Hierarchical Design-for-Test. | C. P. Ravikumar, R. Dandamudi, V. R. Devanathan, N. Haldar, K. Kiran, P. S. Vijay Kumar |
| 2005 | VTS | At-Speed Transition Fault Testing With Low Speed Scan Enable. | Nisar Ahmed, C. P. Ravikumar, Mohammad Tehranipoor, Jim Plusquellic |
| 2004 | ITC | A Holistic Parallel and Hierarchical Approach towards Design-For-Test. | C. P. Ravikumar, Graham Hetherington |
| 2004 | VLSID | Fast, Layout-Aware Validation of Test-Vectors for Nanometer-Related Timing Failures. | Aman Kokrady, C. P. Ravikumar |
| 2004 | VLSID | Multiprocessor Architectures for Embedded System-on-chip Applications. | C. P. Ravikumar |
| 2003 | ICCAD | Static Verification of Test Vectors for IR Drop Failure. | Aman Kokrady, C. P. Ravikumar |
| 2003 | VLSID | Optimal Code and Data Layout in Embedded Systems. | T. S. Rajesh Kumar, R. Govindarajan, C. P. Ravikumar |
| 2003 | VLSID | Mutual Testing based on Wavelet Transforms. | C. P. Ravikumar, Nitin Kakkar, Saurabh Chopra |
| 2002 | VLSID | An Evolutionary Scheme for Cosynthesis of Real-Time Systems. | Shampa Chakraverty, C. P. Ravikumar, D. Roy Choudhuri |
| 2002 | VLSID | Leakage Power Estimation for Deep Submicron Circuits in an ASIC Design Environment. | Rahul Kumar, C. P. Ravikumar |
| 2002 | VLSID | Divide-and-Conquer IDDQ Testing for Core-Based System Chips. | C. P. Ravikumar, Rahul Kumar |
| 2002 | VLSID | Improvement of ASIC Design Processes. | Vineet Sahula, C. P. Ravikumar, D. Nagchoudhuri |
| 2001 | VLSID | Software Power Optimizations In An Embedded System. | Vishal Dalal, C. P. Ravikumar |
| 2001 | VLSID | The Hierarchical Concurrent Flow Graph Approach for Modeling and Analysis of Design Processes. | Vineet Sahula, C. P. Ravikumar |
| 2001 | VLSID | Estimating Crosstalk From Vlsi Layouts. | V. Sankara Subramanian, C. P. Ravikumar |
| 2000 | VLSID | Simultaneous Module Selection and Scheduling for Power-Constrained Testing of Core Based Systems. | C. P. Ravikumar, Gaurav Chandra, Ashutosh Verma |
| 2000 | VLSID | Efficient Implementation of ADPCM Codec. | Anil Sharma, C. P. Ravikumar |
| 1999 | HiPC | Efficient Algorithms for Delay Bounded Multicast Tree Generation for Multimedia Applications. | Nishit Narang, Girish Kumar, C. P. Ravikumar |
| 1999 | HiPC | Design of WDM Networks for Delay-Bound Multicasting. | C. P. Ravikumar, Meeta Sharma, Prachi Jain |
| 1999 | VLSID | Hierarchical Delay Fault Simulation. | C. P. Ravikumar, Ajay Mittal |
| 1999 | VLSID | Improving the Diagnosability of Digital Circuits. | C. P. Ravikumar, Manish Sharma, R. K. Patney |
| 1998 | EuroPar | Adaptive Routing Based on Deadlock Recovery. | Nidhi Agrawal, C. P. Ravikumar |
| 1998 | HiPC | Efficient algorithms for delay-bounded minimum cost path problem in communication networks. | Girish Kumar, Nishit Narang, C. P. Ravikumar |
| 1998 | HiPC | Performance-driven design and redesign of high-speed local area networks. | C. P. Ravikumar, Dilip R. Pandit, Anubhav Mishra |
| 1998 | VLSID | Hybrid Testing Schemes Based on Mutual and Signature Testing. | Mohammed Fadle Abdulla, C. P. Ravikumar, Anshul Kumar |
| 1998 | VLSID | On-Chip Signature Checking for Embedded Memories. | Mohammed Fadle Abdulla, C. P. Ravikumar, Anshul Kumar |
| 1998 | VLSID | An Evolutionary Approach to System Redesign. | Dong-Hyun Heo, Alice C. Parker, C. P. Ravikumar |
| 1998 | VLSID | Synthesis of Testable RTL Designs. | C. P. Ravikumar, Sumit Gupta, Akshay Jajoo |
| 1998 | VLSID | Freedom: Statistical Behavioral Estimation of System Energy and Power. | Suhrid A. Wadekar, Alice C. Parker, C. P. Ravikumar |
| 1997 | DATE | A scheme for multiple on-chip signature checking for embedded SRAMs. | Mohammed Fadle Abdulla, C. P. Ravikumar, Anshul Kumar |
| 1997 | HiPC | Distributed delay constrained multicast path setup algorithm for high speed networks. | Ramnik Bajaj, C. P. Ravikumar, Suresh Chandra |
| 1997 | ICPP | An Euler Path Based Technique for Deadlock-free Multicasting. | Nidhi Agrawal, C. P. Ravikumar |
| 1997 | VLSID | Efficient Implementation of Multiple On-Chip Signature Checking. | Mohammed Fadle Abdulla, C. P. Ravikumar, Anshul Kumar |
| 1997 | VLSID | Rapid Synthesis of Multi-Chip Systems. | Dong-Hyun Heo, Alice C. Parker, C. P. Ravikumar |
| 1997 | VLSID | A Graph-Theoretic Approach for Register File Based Synthesis. | C. P. Ravikumar, R. Aggarwal, C. Sharma |
| 1997 | VLSID | Faster Fault Simulation Through Distributed Computing. | C. P. Ravikumar, Vikas Jain, Anurag Dod |
| 1996 | HiPC | A genetic algorithm for assembling optical computers using faulty optical arrays. | C. P. Ravikumar, Augustine R. Thomas, Abhay Gupta |
| 1996 | VLSID | A Novel BIST Architecture With Built-in Self Check. | Mohammed Fadle Abdulla, C. P. Ravikumar, Anshul Kumar |
| 1996 | VLSID | Estimation of Power from Module-level Netlists. | C. P. Ravikumar, Mukul R. Prasad, Lavmeet S. Hora |
| 1996 | VLSID | Genetic Algorithms for Scan Path Design. | C. P. Ravikumar, Rajamani Rajarajan |
| 1996 | VLSID | Synthesis of Testable Pipelined Datapaths Using Genetic Search. | C. P. Ravikumar, Vikram Saxena |
| 1995 | VLSID | HISCOAP: a hierarchical testability analysis tool. | C. P. Ravikumar, Hemant Joshi |
| 1994 | VLSID | Simulated Annealing for Target-Oriented Scan. | C. P. Ravikumar, Haroon Rasheed |
| 1993 | ICPP | Incomplete Star Graph: An Economical Fault-tolerant Interconnection Network. | C. P. Ravikumar, A. Kuchlous, G. Manimaran |
| 1993 | ICTAI | A Parallel Search-and-Learn Technique for Solving Large Scale TSP. | C. P. Ravikumar |
| 1992 | VLSID | Solving Physical Design Problems on a Vector Machine. | C. P. Ravikumar |
| 1989 | ICPP | Parallel Placement on Hypercube Architecture. | C. P. Ravikumar, Sarma Sastry |
| 1988 | DAC | Parallel Placement on Reduced Array Architecture. | C. P. Ravikumar, Sarma Sastry |
| 1987 | ICPP | An Architecture for CSP and Its Simulation. | C. P. Ravikumar, Lalit M. Patnaik |