| 2019 | IOLTS | Methodology for Tradeoffs between Performance and Lifetimes of Integrated Circuits. | Daniel J. Weyer, Francis G. Wolff, Christos A. Papachristou, Steve Clay |
| 2015 | DATE | A robust authentication methodology using physically unclonable functions in DRAM arrays. | Maryam S. Hashemian, Bhanu Pratap Singh, Francis G. Wolff, Daniel J. Weyer, Steve Clay, Christos A. Papachristou |
| 2014 | DAC | Ontology-guided Conceptual Analysis of Design Specifications. | Arunprasath Shankar, Bhanu Pratap Singh, Francis G. Wolff, Christos A. Papachristou |
| 2014 | DATE | Cross-correlation of specification and RTL for soft IP analysis. | Bhanu Pratap Singh, Arunprasath Shankar, Francis G. Wolff, Christos A. Papachristou, Daniel J. Weyer, Steve Clay |
| 2014 | VLSID | Knowledge-Guided Methodology for Third-Party Soft IP Analysis. | Bhanu Pratap Singh, Arunprasath Shankar, Francis G. Wolff, Daniel J. Weyer, Christos A. Papachristou, Bhanu Negi |
| 2013 | ICTAI | Expert System Simulation of Hardware. | Lawrence Leinweber, Bhanu Pratap Singh, Christos A. Papachristou |
| 2013 | ICTAI | NEFCIS: Neuro-fuzzy Concept Based Inference System for Specification Mining. | Arunprasath Shankar, Bhanu Pratap Singh, Francis G. Wolff, Christos A. Papachristou |
| 2013 | ICTAI | Knowledge-Guided Methodology for Specification Analysis. | Bhanu Pratap Singh, Arunprasath Shankar, Yuriy Shiyanovskii, Francis G. Wolff, Christos A. Papachristou, Daniel J. Weyer, Steve Clay, Jim Morrison |
| 2011 | CISS | An analysis of efficient formulas for elliptic curve point addition over binary extension fields. | Lawrence Leinweber, Christos A. Papachristou, Francis G. Wolff |
| 2011 | ICCD | Fast and compact binary-to-BCD conversion circuits for decimal multiplication. | Osama Daifallah Al-Khaleel, Zakaria Al-Qudah, Mohammad Al-Khaleel, Christos A. Papachristou, Francis G. Wolff |
| 2011 | IOLTS | Noise margin, critical charge and power-delay tradeoffs for SRAM design. | Aravind Rajendran, Yuriy Shiyanovskii, Frank Wolff, Christos A. Papachristou |
| 2011 | IOLTS | A novel radiation tolerant SRAM design based on synergetic functional component separation for nanoscale CMOS. | Yuriy Shiyanovskii, Aravind Rajendran, Christos A. Papachristou |
| 2010 | IOLTS | Trustworthy computing in a multi-core system using distributed scheduling. | David R. McIntyre, Francis G. Wolff, Christos A. Papachristou, Swarup Bhunia |
| 2009 | CHES | MERO: A Statistical Approach for Hardware Trojan Detection. | Rajat Subhra Chakraborty, Francis G. Wolff, Somnath Paul, Christos A. Papachristou, Swarup Bhunia |
| 2009 | ICCD | Efficient architectures for elliptic curve cryptography processors for RFID. | Lawrence Leinweber, Christos A. Papachristou, Francis G. Wolff |
| 2009 | IOLTS | Panel: Realistic low power design: Let errors occur and correct them later or mitigate errors via design guardbanding and process control?. | Abhijit Chatterjee, Jacob A. Abraham, Adit D. Singh, Elie Maricau, Rakesh Kumar, Christos A. Papachristou |
| 2009 | IOLTS | SRAM cell design using tri-state devices for SEU protection. | Yuriy Shiyanovskii, Francis G. Wolff, Christos A. Papachristou |
| 2008 | DATE | Towards Trojan-Free Trusted ICs: Problem Analysis and Detection Scheme. | Francis G. Wolff, Christos A. Papachristou, Swarup Bhunia, Rajat Subhra Chakraborty |
| 2008 | IJCNN | Multi-label imbalanced data enrichment process in neural net classifier training. | Gorn Tepvorachai, Christos A. Papachristou |
| 2008 | IOLTS | SRAM Cell Design Protected from SEU Upsets. | Yuriy Shiyanovskii, Francis G. Wolff, Christos A. Papachristou |
| 2007 | DATE | Interactive presentation: A new asymmetric SRAM cell to reduce soft errors and leakage power in FPGA. | Balkaran S. Gill, Christos A. Papachristou, Francis G. Wolff |
| 2007 | IOLTS | An Elliptic Curve Cryptosystem Design Based on FPGA Pipeline Folding. | Osama Daifallah Al-Khaleel, Christos A. Papachristou, Francis G. Wolff, Kiamal Z. Pekmestzi |
| 2006 | DATE | Soft delay error analysis in logic circuits. | Balkaran S. Gill, Christos A. Papachristou, Francis G. Wolff |
| 2006 | FPL | A Dynamic Reconfigurable Fabric for Platform SoCs. | Christos A. Papachristou, J. Weaver, R. Vijayakumar, Francis G. Wolff |
| 2006 | ICCD | FPGA-based Design of a Large Moduli Multiplier for Public Key Cryptographic Systems. | Osama Daifallah Al-Khaleel, Christos A. Papachristou, Francis G. Wolff, Kiamal Z. Pekmestzi |
| 2005 | DATE | An Efficient BICS Design for SEUs Detection and Correction in Semiconductor Memories. | Balkaran S. Gill, Michael Nicolaidis, Francis G. Wolff, Christos A. Papachristou, Steven L. Garverick |
| 2005 | FPGA | Accelerating mutual information-based 3D medical image registration with An FPGA computing platform (abstract only). | Jianchun Li, Christos A. Papachristou, Raj Shekhar |
| 2005 | IOLTS | Radiation Induced Single-Word Multiple-Bit Upsets Correction in SRAM. | Balkaran S. Gill, Michael Nicolaidis, Christos A. Papachristou |
| 2005 | ITC | Node sensitivity analysis for soft errors in CMOS logic. | Balkaran S. Gill, Christos A. Papachristou, Francis G. Wolff, Norbert Seifert |
| 2004 | DATE | Designing Self Test Programs for Embedded DSP Cores. | Hani Rizk, Christos A. Papachristou, Francis G. Wolff |
| 2004 | DATE | Test Compression and Hardware Decompression for Scan-Based SoCs. | Francis G. Wolff, Christos A. Papachristou, David R. McIntyre |
| 2004 | FCCM | A Reconfigurable SoC Architecture and Caching Scheme for 3D Medical Image Processing. | Jianchun Li, Christos A. Papachristou, Raj Shekhar |
| 2004 | VTS | Soft Delay Error Effects in CMOS Combinational Circuits. | Balkaran S. Gill, Christos A. Papachristou, Francis G. Wolff |
| 2003 | DATE | A Technique for High Ratio LZW Compression. | Michael J. Knieser, Francis G. Wolff, Christos A. Papachristou, Daniel J. Weyer, David R. McIntyre |
| 2002 | ITC | Multiscan-Based Test Compression and Hardware Decompression Using LZ77. | Francis G. Wolff, Christos A. Papachristou |
| 2001 | DAC | Test Strategies for BIST at the Algorithmic and Register-Transfer Levels. | Kelly A. Ockunzzi, Christos A. Papachristou |
| 2001 | DAC | Improving Bus Test Via I | Shih-Yu Yang, Christos A. Papachristou, Massood Tabib-Azar |
| 2001 | VTS | Breaking Correlation to Improve Testability. | Kelly A. Ockunzzi, Christos A. Papachristou |
| 2000 | DAC | Synthesis-for-testability of controller-datapath pairs that use gated clocks. | Mehrdad Nourani, Joan Carletta, Christos A. Papachristou |
| 2000 | DATE | Detecting Undetectable Controller Faults Using Power Analysis. | Joan Carletta, Christos A. Papachristou, Mehrdad Nourani |
| 2000 | ITC | An ILP formulation to optimize test access mechanism in system-on-chip testing. | Mehrdad Nourani, Christos A. Papachristou |
| 1999 | DAC | Microprocessor Based Testing for Core-Based System on Chip. | Christos A. Papachristou, F. Martin, Mehrdad Nourani |
| 1999 | DATE | Synthesis of Controllers for Full Testability of Integrated Datapath-Controller Pairs. | Joan Carletta, Mehrdad Nourani, Christos A. Papachristou |
| 1999 | DATE | A Method of Distributed Controller Design for RTL Circuits. | Christos A. Papachristou, Yusuf Alzazeri |
| 1999 | ITC | High Time for Higher Level BIST. | Christos A. Papachristou |
| 1999 | VTS | Instruction Randomization Self Test For Processor Cores. | Ken Batcher, Christos A. Papachristou |
| 1998 | DATE | A Bypass Scheme for Core-Based System Fault Testing. | Mehrdad Nourani, Christos A. Papachristou |
| 1998 | DATE | Testing DSP Cores Based on Self-Test Programs. | Wei Zhao, Christos A. Papachristou |
| 1998 | VTS | Parallelism in Structural Fault Testing of Embedded Cores. | Mehrdad Nourani, Christos A. Papachristou |
| 1997 | DAC | A Scheme for Integrated Controller-Datapath Fault Testing. | Mehrdad Nourani, Joan Carletta, Christos A. Papachristou |
| 1997 | DATE | Structural BIST insertion using behavioral test analysis. | Mehrdad Nourani, Christos A. Papachristou |
| 1997 | ICCAD | A test synthesis technique using redundant register transfers. | Christos A. Papachristou, Mikhail Baklashov |
| 1997 | ICCD | High Level Test Synthesis Across the Boundary of Behavioral and Structural Domains. | Kowen Lai, Christos A. Papachristou, Mikhail Baklashov |
| 1997 | ITC | Testability Enhancement for Behavioral Descriptions Containing Conditional Statements. | Kelly A. Ockunzzi, Christos A. Papachristou |
| 1996 | DAC | A Register File and Scheduling Model for Application Specific Processor Synthesis. | Ehat Ercanli, Christos A. Papachristou |
| 1996 | DAC | An Effective Power Management Scheme for RTL Design Based on Multiple Clocks. | Christos A. Papachristou, Mark Spining, Mehrdad Nourani |
| 1996 | DATE | An evolution programming approach on multiple behaviors for the design of application specific programmable processors. | Wei Zhao, Christos A. Papachristou |
| 1996 | ICCAD | Synthesis of reusable DSP cores based on multiple behaviors. | Wei Zhao, Christos A. Papachristou |
| 1996 | VTS | Hardware-Software Co-Design for Test: It's the Last Straw! | J. El-Ziq, Najmi T. Jarwala, Niraj K. Jha, Peter Marwedel, Christos A. Papachristou, Janusz Rajski, John W. Sheppard |
| 1995 | DATE | A method for testability analysis and BIST insertion at the RTL. | Joan Carletta, Christos A. Papachristou |
| 1995 | ICCAD | Architectural partitioning of control memory for application specific programmable processors. | Wei Zhao, Christos A. Papachristou |
| 1995 | ICCD | Testability analysis and insertion for RTL circuits based on pseudorandom BIST. | Joan Carletta, Christos A. Papachristou |
| 1995 | ISLPED | A multiple clocking scheme for low power RTL design. | Christos A. Papachristou, Mark Spining, Mehrdad Nourani |
| 1995 | ITC | Test Synthesis in the Behavioral Domain. | Christos A. Papachristou, Joan Carletta |
| 1995 | VTS | Structural constraints for circular self-test paths. | Joan Carletta, Christos A. Papachristou |
| 1994 | VTS | Structural constraints for circular self-test paths. | Joan Carletta, Christos A. Papachristou |
| 1993 | DAC | A Layout Estimation Algorithm for RTL Datapaths. | Mehrdad Nourani, Christos A. Papachristou |
| 1993 | DAC | An Approach for Redesigning in Data Path Synthesis. | Christos A. Papachristou, Haidar Harmanani, Mehrdad Nourani |
| 1993 | ICCAD | An improved method for RTL synthesis with testability tradeoffs. | Haidar Harmanani, Christos A. Papachristou |
| 1993 | ICCD | A Partial Scan Cost Estimation Method at the System Level. | Scott Chiu, Christos A. Papachristou |
| 1993 | MICRO | A VLIW architecture based on shifting register files. | H. Fatih Ugurdag, Christos A. Papachristou |
| 1992 | DAC | Move Frame Scheduling and Mixed Scheduling-Allocation for the Automated Synthesis of Digital Systems. | Mehrdad Nourani, Christos A. Papachristou |
| 1992 | ICCD | ALMP: A Shifting Memory Architecture for Loop Pipelining. | H. Fatih Ugurdag, Christos A. Papachristou |
| 1992 | MICRO | Y-Pipe: a conditional branching scheme without pipeline delays. | Michael J. Knieser, Christos A. Papachristou |
| 1991 | DAC | A Design for Testability Scheme with Applications to Data Path Synthesis. | Scott Chiu, Christos A. Papachristou |
| 1991 | DAC | A Data Path Synthesis Method for Self-Testable Designs. | Christos A. Papachristou, Scott Chiu, Haidar Harmanani |
| 1991 | ICCD | A Built-In Self-Testing Approach for Minimizing Hardware Overhead. | Scott Chiu, Christos A. Papachristou |
| 1991 | ICCD | SYNTEST: A Method for High-Level SYNthesis with Self-TESTability. | Christos A. Papachristou, Scott Chiu, Haidar Harmanani |
| 1990 | DAC | A Linear Program Driven Scheduling and Allocation Method Followed by an Interconnect Optimization Algorithm. | Christos A. Papachristou, Haluk Konuk |
| 1990 | ICTAI | Extending Athena: multiple classes and confidence output values. | Cris Koutsougeras, George Georgiou, Christos A. Papachristou |
| 1990 | MICRO | An instruction reoderer for pipelined computers. | Jong-Jiann Shieh, Christos A. Papachristou |
| 1990 | MICRO | SMDSS - a structured microcode development and simulation system. | Djahida Smati, Jerry P.-C. Hwang, Christos A. Papachristou |
| 1989 | DAC | A Coordinated Approach to Partitioning and Test Pattern Generation for Pseudoexhaustive Testing. | Wen-Ben Jone, Christos A. Papachristou |
| 1989 | DAC | A Scheme for Overlaying Concurrent Testing of VLSI Circuits. | Wen-Ben Jone, Christos A. Papachristou, M. Pereira |
| 1989 | MICRO | On reordering instruction streams for pipelined computers. | Jong-Jiann Shieh, Christos A. Papachristou |
| 1988 | MICRO | Mapping of micro data flow computations on parallel microarchitectures. | L. Shih, Christos A. Papachristou |
| 1987 | ICS | A Systolic Array Structure for Matrix Multiplication in the Residue Number System. | Christos A. Papachristou, Suntae Hwang |
| 1986 | MICRO | Data flow graph partitioning to reduce communication cost. | Cris Koutsougeras, Christos A. Papachristou, Ranga Vemuri |
| 1985 | ARITH | Multi - Input residue arithmetic utilizing read - Only associative memory. | Christos A. Papachristou |
| 1985 | MICRO | Microcode development for microprogrammed processors. | Jerry P.-C. Hwang, Christos A. Papachristou, Danny D. Cornett |
| 1984 | MICRO | An automatic migration scheme based on modular microcode and structured firmware sequencing. | Christos A. Papachristou, Venkata R. Immaneni, D. B. Sarma |
| 1982 | MICRO | A microsequencer architecture with firmware support for modular microprogramming. | Christos A. Papachristou, Satnam Sing Gambhir |
| 1981 | ARITH | Algorithms for parallel addition and parallel polynomial evaluation. | Christos A. Papachristou |
| 1981 | MICRO | Hardware microcontrol schemes using PLAs. | Christos A. Papachristou |