David Novo
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
55
Venues
21
Active years
2008–2026
Best venue rank
A*
Where they publish
- ADATE18 papers
- BFPL5 papers
- CRSP4 papers
- A*DAC4 papers
- AFPGA4 papers
- A*MICRO2 papers
- CDDECS2 papers
- NationalFCCM2 papers
- AICCAD2 papers
- CIOLTS1 paper
- ADSN1 paper
- BASPDAC1 paper
- CDSD1 paper
- A*ISCA1 paper
- AESORICS1 paper
- BETS1 paper
- AFAST1 paper
- NationalACSSC1 paper
- ACHES1 paper
- BGLOBECOM1 paper
- MulticonferenceICASSP1 paper
Papers
55 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2026 | IOLTS | Hybrid Hardening for Robust DNNs Under Adversarial Attacks. | Leonardo Alexandrino De Melo, Manar Gani, Alberto Bosio, Ovidiu Stan, Vlad-Cristian Miclea, Liviu Miclea, Rodrigo Possamai Bastos, David Novo, Bastien Deveautour |
| 2025 | DATE | c2c-gem5: Full System Simulation of Cache-Coherent Chip-to-Chip Interconnects. | Luis Bertran Alvarez, Ghassan Chehaibar, Stephen Busch, Pascal Benoit, David Novo |
| 2025 | DSN | EasyDRAM: An FPGA-based Infrastructure for Fast and Accurate End-to-End Evaluation of Emerging DRAM Techniques. | Oguzhan Canpolat, Ataberk Olgun, David Novo, Oguz Ergin, Onur Mutlu |
| 2025 | RSP | ADAM: ADAptive Microcontroller Platform for Edge AI Systems. | Felipe Paiva Alencar, Aymen Romdhane, Bruno Lovison Franco, Yann Guilhot, Jonathan Miquel, Theo Soriano, David Novo, Pascal Benoit |
| 2025 | RSP | Exploring Cache Policies on FPGA-Accelerated Simulations: Tradeoffs Between Usability and Simulation Speed. | Soraya Mobaraki, Thierry Gil, Lionel Torres, David Novo |
| 2024 | DATE | Multi-Level Analysis of GPU Utilization in ML Training Workloads. | Paul Delestrac, Debjyoti Bhattacharjee, Simei Yang, Diksha Moolchandani, Francky Catthoor, Lionel Torres, David Novo |
| 2022 | ASPDAC | A Heuristic Exploration of Retraining-free Weight-Sharing for CNN Compression. | Etienne Dupuis, David Novo, Ian O'Connor, Alberto Bosio |
| 2022 | DAC | Pref-X: a framework to reveal data prefetching in commercial in-order cores. | Quentin Huppert, Francky Catthoor, Lionel Torres, David Novo |
| 2022 | DSD | Demystifying the TensorFlow Eager Execution of Deep Learning Inference on a CPU-GPU Tandem. | Paul Delestrac, Lionel Torres, David Novo |
| 2022 | ISCA | Sibyl: adaptive and extensible data placement in hybrid storage systems using online reinforcement learning. | Gagandeep Singh, Rakesh Nadig, Jisung Park, Rahul Bera, Nastaran Hajinazar, David Novo, Juan Gmez-Luna, Sander Stuijk, Henk Corporaal, Onur Mutlu |
| 2022 | MICRO | Flash-Cosmos: In-Flash Bulk Bitwise Operations Using Inherent Computation Capability of NAND Flash Memory. | Jisung Park, Roknoddin Azizi, Geraldo F. Oliveira, Mohammad Sadrosadati, Rakesh Nadig, David Novo, Juan Gmez-Luna, Myungsuk Kim, Onur Mutlu |
| 2022 | MICRO | Hermes: Accelerating Long-Latency Load Requests via Perceptron-Based Off-Chip Load Prediction. | Rahul Bera, Konstantinos Kanellopoulos, Shankar Balachandran, David Novo, Ataberk Olgun, Mohammad Sadrosadati, Onur Mutlu |
| 2021 | DATE | Memory Hierarchy Calibration Based on Real Hardware In-order Cores for Accurate Simulation. | Quentin Huppert, Timon Evenblij, Manu Perumkunnil, Francky Catthoor, Lionel Torres, David Novo |
| 2021 | DDECS | AdequateDL: Approximating Deep Learning Accelerators. | Olivier Sentieys, Silviu-Ioan Filip, David Briand, David Novo, Etienne Dupuis, Ian O'Connor, Alberto Bosio |
| 2021 | ESORICS | Diminisher: A Linux Kernel Based Countermeasure for TAA Vulnerability. | Ameer Hamza, Maria Mushtaq, Khurram Bhatti, David Novo, Florent Bruguier, Pascal Benoit |
| 2021 | ETS | Transit-Guard: An OS-based Defense Mechanism Against Transient Execution Attacks. | Maria Mushtaq, David Novo, Florent Bruguier, Pascal Benoit, Muhammad Khurram Bhatti |
| 2021 | RSP | Implementing Rowhammer Memory Corruption in the gem5 Simulator. | Loc France, Florent Bruguier, Maria Mushtaq, David Novo, Pascal Benoit |
| 2021 | RSP | An FPGA-based Emulation Platform for Edge Computing Node Design Exploration. | Theo Soriano, David Novo, Pascal Benoit |
| 2020 | DATE | On the Automatic Exploration of Weight Sharing for Deep Neural Network Compression. | Etienne Dupuis, David Novo, Ian O'Connor, Alberto Bosio |
| 2020 | DDECS | Sensitivity Analysis and Compression Opportunities in DNNs Using Weight Sharing. | Etienne Dupuis, David Novo, Ian O'Connor, Alberto Bosio |
| 2018 | DATE | Main memory organization trade-offs with DRAM and STT-MRAM options based on gem5-NVMain simulation frameworks. | Manu Komalan, Oh Hyung Rock, Matthias Hartmann, Sushil Sakhare, Christian Tenllado, Jos Ignacio Gmez, Gouri Sankar Kar, Arnaud Furnmont, Francky Catthoor, Sophiane Senni, David Novo, Abdoulaye Gamati, Lionel Torres |
| 2016 | FPGA | FPRESSO: Enabling Express Transistor-Level Exploration of FPGA Architectures. | Grace Zgheib, Manana Lortkipanidze, Muhsen Owaida, David Novo, Paolo Ienne |
| 2015 | DATE | Retraining-based timing error mitigation for hardware neural networks. | Jiachao Deng, Yuntan Fang, Zidong Du, Ying Wang, Huawei Li, Olivier Temam, Paolo Ienne, David Novo, Xiaowei Li, Yunji Chen, Chengyong Wu |
| 2015 | FCCM | Fast Design Space Exploration Using Vivado HLS: Non-binary LDPC Decoders. | Joo Andrade, Nithin George, Kimon Karras, David Novo, Vtor Manuel Mendes da Silva, Paolo Ienne, Gabriel Falco Paiva Fernandes |
| 2015 | FPL | From low-architectural expertise up to high-throughput non-binary LDPC decoders: Optimization guidelines using high-level synthesis. | Joo Andrade, Nithin George, Kimon Karras, David Novo, Vtor Manuel Mendes da Silva, Paolo Ienne, Gabriel Falco Paiva Fernandes |
| 2015 | FPL | Automatic support for multi-module parallelism from computational patterns. | Nithin George, HyoukJoong Lee, David Novo, Muhsen Owaida, David Andrews, Kunle Olukotun, Paolo Ienne |
| 2015 | FPL | A technology mapper for depth-constrained FPGA logic cells. | Zhenghong Jiang, Grace Zgheib, Colin Yu Lin, David Novo, Zhihong Huang, Liqun Yang, Haigang Yang, Paolo Ienne |
| 2014 | DATE | SKETCHILOG: Sketching combinational circuits. | Andrew Becker, David Novo, Paolo Ienne |
| 2014 | DATE | Energy efficient MIMO processing: A case study of opportunistic run-time approximations. | David Novo, Nazanin Farahpour, Paolo Ienne, Ubaid Ahmad, Francky Catthoor |
| 2014 | FAST | Wear unleveling: improving NAND flash lifetime by balancing page endurance. | Xavier Jimenez, David Novo, Paolo Ienne |
| 2014 | FPGA | Revisiting and-inverter cones. | Grace Zgheib, Liqun Yang, Zhihong Huang, David Novo, Hadi Parandeh-Afshar, Haigang Yang, Paolo Ienne |
| 2014 | FPL | Hardware system synthesis from Domain-Specific Languages. | Nithin George, HyoukJoong Lee, David Novo, Tiark Rompf, Kevin J. Brown, Arvind K. Sujeeth, Martin Odersky, Kunle Olukotun, Paolo Ienne |
| 2014 | ICCAD | Constrained interpolation for guided logic synthesis. | Ana Petkovska, David Novo, Alan Mishchenko, Paolo Ienne |
| 2013 | ACSSC | Automated circuit elaboration from incomplete architectural descriptions. | Andrew Becker, David Novo, Paolo Ienne |
| 2013 | CHES | Sleuth: Automated Verification of Software Power Analysis Countermeasures. | Ali Galip Bayrak, Francesco Regazzoni, David Novo, Paolo Ienne |
| 2013 | DATE | An EDA-friendly protection scheme against side-channel attacks. | Ali Galip Bayrak, Nikola Velickovic, Francesco Regazzoni, David Novo, Philip Brisk, Paolo Ienne |
| 2013 | DATE | Phœnix: reviving MLC blocks as SLC to extend NAND flash devices lifetime. | Xavier Jimenez, David Novo, Paolo Ienne |
| 2013 | DATE | Accuracy vs speed tradeoffs in the estimation of fixed-point errors on linear time-invariant systems. | David Novo, Sara El Alaoui, Paolo Ienne |
| 2013 | FPGA | Shadow AICs: reaping the benefits of and-inverter cones with minimal architectural impact (abstract only). | Hadi Parandeh-Afshar, Grace Zgheib, David Novo, Madhura Purnaprajna, Paolo Ienne |
| 2013 | FPL | Shadow And-Inverter Cones. | Hadi Parandeh-Afshar, Grace Zgheib, David Novo, Madhura Purnaprajna, Paolo Ienne |
| 2012 | DAC | Software controlled cell bit-density to improve NAND flash lifetime. | Xavier Jimenez, David Novo, Paolo Ienne |
| 2012 | DATE | Selective flexibility: Breaking the rigidity of datapath merging. | Mirjana Stojilovic, David Novo, Lazar Saranovac, Philip Brisk, Paolo Ienne |
| 2012 | FCCM | Shortening Design Time through Multiplatform Simulations with a Portable OpenCL Golden-model: The LDPC Decoder Case. | Gabriel Falco, Muhsen Owaida, David Novo, Madhura Purnaprajna, Nikolaos Bellas, Christos D. Antonopoulos, Georgios Karakonstantis, Andreas Burg, Paolo Ienne |
| 2012 | FPGA | Rethinking FPGAs: elude the flexibility excess of LUTs with and-inverter cones. | Hadi Parandeh-Afshar, Hind Benbihi, David Novo, Paolo Ienne |
| 2010 | DAC | Exploiting finite precision information to guide data-flow mapping. | David Novo, Min Li, Robert Fasthuber, Praveen Raghavan, Francky Catthoor |
| 2010 | ICCAD | Fast performance evaluation of fixed-point systems with un-smooth operators. | Karthick Parashar, Daniel Mnard, Romuald Rocher, Olivier Sentieys, David Novo, Francky Catthoor |
| 2009 | DATE | Algorithm-architecture co-design of soft-output ML MIMO detector for parallel application specific instruction set processors. | Min Li, Robert Fasthuber, David Novo, Bruno Bougard, Liesbet Van der Perre, Francky Catthoor |
| 2009 | DATE | Finite precision processing in wireless applications. | David Novo, Min Li, Bruno Bougard, Liesbet Van der Perre, Francky Catthoor |
| 2008 | DAC | How to let instruction set processor beat ASIC for low power wireless baseband implementation: a system level approach. | Min Li, Bruno Bougard, David Novo, Liesbet Van der Perre, Francky Catthoor |
| 2008 | DATE | A Coarse-Grained Array based Baseband Processor for 100Mbps+ Software Defined Radio. | Bruno Bougard, Bjorn De Sutter, Sebastien Rabou, David Novo, Osman Allam, Steven Dupont, Liesbet Van der Perre |
| 2008 | DATE | Optimizing Near-ML MIMO Detector for SDR Baseband on Parallel Programmable Architectures. | Min Li, Bruno Bougard, Weiyu Xu, David Novo, Liesbet Van der Perre, Francky Catthoor |
| 2008 | DATE | Generic Multi-Phase Software-Pipelined Partial-FFT on Instruction-Level-Parallel Architectures and SDR Baseband Applications. | Min Li, David Novo, Bruno Bougard, Liesbet Van der Perre, Francky Catthoor |
| 2008 | DATE | Scenario-Based Fixed-point Data Format Refinement to Enable Energy-scalable Software Defined Radios. | David Novo, Bruno Bougard, Andy Lambrechts, Liesbet Van der Perre, Francky Catthoor |
| 2008 | GLOBECOM | Adaptive SSFE Near-ML MIMO Detector with Dynamic Search Range and 80-103Mbps Flexible Implementation. | Min Li, Bruno Bougard, David Novo, Wim Van Thillo, Liesbet Van der Perre, Francky Catthoor |
| 2008 | ICASSP | Bridging the energy gap in size, weight and power constrained software defined radio: Agile baseband processing as a key enabler. | Bruno Bougard, Min Li, David Novo, Liesbet Van der Perre, Francky Catthoor |