| 2025 | DAC | Graph-Guided Transfer Learning to Boost the Efficiency of System-Level Optimization of Analog/Mixed-Signal Circuits. | Jiaqi Wang, Georges G. E. Gielen |
| 2025 | ETS | European Test Symposium Teams: an Anniversary Snapshot. | Maksim Jenihhin, Jaan Raik, Artur Jutman, Natalia Cherezova, Raimund Ubar, Liviu Miclea, Szilrd Enyedi, Iulia Stefan, Ovidiu Stan, Cosmina Corches, Zebo Peng, Petru Eles, Rolf Drechsler, S. Eggersgl, Grschwin Fey, Andreas Glowatz, Daniel Tille, Georges G. E. Gielen, Anthony Coyette, Wim Dobbelaere, Ronny Vanhooren, Po-Yao Chuang, Erik Jan Marinissen, Giorgio Di Natale, M. Barragan, Paolo Maistri, S. Mir, Vatajelu I. Vatajelu, Paolo Bernardi, Stefano Di Carlo, Paolo Prinetto, Matteo Sonza Reorda, Massimo Violante, Haralampos-G. Stratigopoulos, M. K. Michael, Stelios Neophytou, Stavros Hadjitheophanous, Kyriakos Christou, M. Skitsas, Alberto Bosio, Bastien Deveautour, Patrick Girard, Marcello Traiola, Arnaud Virazel, Fernando Fernandes dos Santos, Angeliki Kritikakou, Gioele Casagranda, Marzio Vallero, Flavio Vella, Paolo Rech, Letcia Maria Bolzani Poehls, Milos Krstic, Marko S. Andjelkovic, Fabian Luis Vargas, Grigor Tshagharyan, Gurgen Harutyunyan, Valery A. Vardanian, Samvel K. Shoukourian, Yervant Zorian, Jennifer Dworak, Kundan Nepal, Theodore W. Manikas, Mottaqiallah Taouil, Moritz Fieback, Anteneh Gebregiorgis, Rajendra Bishnoi, Said Hamdioui, Abhijit Chatterjee, Anurup Saha, Suhasini Komarraju, K. Ma, Chandramouli N. Amarnath, Mehdi Baradaran Tahoori, Mahta Mayahinia, Maryam Rajabalipanah, Katayoon Basharkhah, N. Nosrati, Zahra Jahanpeima, Zain Navabi, Hans-Joachim Wunderlich, Sybille Hellebrand |
| 2025 | ICCAD | (Invited Paper) AnaFlow: Agentic LLM-based Workflow for Reasoning-Driven Explainable and Sample-Efficient Analog Circuit Sizing. | Mohsen Ahmadzadeh, Kaichang Chen, Georges G. E. Gielen |
| 2025 | ISCAS | DERMIS: Toward a Fully-Integrated Large-Area High-Resolution Tactile Slip Sensing Solution. | Mark Daniel Alea, Maria Atalaia Rosa, Sara Farfalha, Kris Myny, Georges G. E. Gielen |
| 2025 | ISCAS | A Digital Jitter Correction Technique For High-Speed ADC-Based Communication Links. | Tim Borremans, Jun Feng, Jonah Van Assche, Georges G. E. Gielen, Filip Tavernier |
| 2025 | ISCAS | CIPL: A Fast and Low-Power Level Shifter for Wide-Range Voltage Conversion. | Weijie Jiang, Xinfa Zheng, Jiacong Sun, Georges G. E. Gielen, Marian Verhelst, Wim Dehaene |
| 2024 | DAC | Using Probabilistic Model Rollouts to Boost the Sample Efficiency of Reinforcement Learning for Automated Analog Circuit Sizing. | Mohsen Ahmadzadeh, Georges G. E. Gielen |
| 2024 | DATE | Self-Learning and Transfer Across Topologies of Constraints for Analog / Mixed-Signal Circuit Layout Synthesis. | Kaichang Chen, Georges G. E. Gielen |
| 2024 | ETS | Silent Data Corruption: Test or Reliability Problem? | Erik Jan Marinissen, Harish Dattatraya Dixit, Ronald Shawn Blanton, Aaron Kuo, Wei Li, Subhasish Mitra, Chris Nigh, Ruben Purdy, Ben Kaczer, Dishant Sangani, Pieter Weckx, Philippe J. Roussel, Georges G. E. Gielen |
| 2024 | ISCAS | A 70dB SNDR 20MHz-BW VCO-Based CT Sturdy MASH Delta-Sigma Modulator with Robust Quantization Error Extraction. | Xinpeng Gui, Xinfa Zheng, Haigang Feng, Georges G. E. Gielen, Zhihua Wang, Xinpeng Xing |
| 2023 | DATE | End-to-End Optimization of High-Density e-Skin Design: From Spiking Taxel Readout to Texture Classification. | Jiaqi Wang, Mark Daniel Alea, Jonah Van Assche, Georges G. E. Gielen |
| 2023 | ETS | High-coverage analog IP block test generation methodology using low-cost signal generation and output response analysis. | Jhon Gomez, Nektar Xama, Anthony Coyette, Ronny Vanhooren, Wim Dobbelaere, Georges G. E. Gielen |
| 2023 | ETS | Study of Transistor Metrics for Room-Temperature Screening of Single Electron Transistors for Silicon Spin Qubit Applications. | Francesco Lorenzelli, Asser Elsayed, Clement Godfrin, Alexander Grill, Stefan Kubicek, Ruoyu Li, Michele Stucchi, Danny Wan, Kristiaan De Greve, Erik Jan Marinissen, Georges G. E. Gielen |
| 2023 | ICRA | Fusing Event-based Camera and Radar for SLAM Using Spiking Neural Networks with Continual STDP Learning. | Ali Safa, Tim Verbelen, Ilja Ocket, Andr Bourdoux, Hichem Sahli, Francky Catthoor, Georges G. E. Gielen |
| 2023 | ITC | Wafer-Scale Electrical Characterization of Silicon Quantum Dots from Room to Low Temperatures. | Francesco Lorenzelli, Asser Elsayed, Clement Godfrin, Alexander Grill, Stefan Kubicek, Ruoyu Li, Michele Stucchi, Danny Wan, Kristiaan De Greve, Erik Jan Marinissen, Georges G. E. Gielen |
| 2023 | VTS | Effective and Efficient Testing of Large Numbers of Inter-Die Interconnects in Chiplet-Based Multi-Die Packages. | Po-Yao Chuang, Francesco Lorenzelli, Sreejit Chakravarty, Cheng-Wen Wu, Georges G. E. Gielen, Erik Jan Marinissen |
| 2022 | DATE | EffiCSense: an Architectural Pathfinding Framework for Energy-Constrained Sensor Applications. | Jonah Van Assche, Ruben Helsen, Georges G. E. Gielen |
| 2022 | IJCNN | Event Camera Data Classification Using Spiking Networks with Spike-Timing-Dependent Plasticity. | Ali Safa, Ilja Ocket, Andr Bourdoux, Hichem Sahli, Francky Catthoor, Georges G. E. Gielen |
| 2021 | DATE | Circuit models for the co-simulation of superconducting quantum computing systems. | Rohith Acharya, Fahd A. Mohiyaddin, Anton Potocnik, Kristiaan De Greve, Bogdan Govoreanu, Iuliana P. Radu, Georges G. E. Gielen, Francky Catthoor |
| 2020 | ETS | Latent Defect Screening with Visually-Enhanced Dynamic Part Average Testing. | Anthony Coyette, Wim Dobbelaere, Ronny Vanhooren, Nektar Xama, Jhon Gomez, Georges G. E. Gielen |
| 2020 | ETS | Avoiding Mixed-Signal Field Returns by Outlier Detection of Hard-to-Detect Defects based on Multivariate Statistics. | Nektar Xama, Jakob Raymaekers, Martin Andraud, Jhon Gomez, Wim Dobbelaere, Ronny Vanhooren, Anthony Coyette, Georges G. E. Gielen |
| 2020 | ITC | Quick Analyses for Improving Reliability and Functional Safety of Mixed-Signal ICs. | Stephen Sunter, Michal Wolinski, Anthony Coyette, Ronny Vanhooren, Wim Dobbelaere, Nektar Xama, Jhon Gomez, Georges G. E. Gielen |
| 2020 | VTS | Pinhole Latent Defect Modeling and Simulation for Defect-Oriented Analog/Mixed-Signal Testing. | Jhon Gomez, Nektar Xama, Anthony Coyette, Ronny Vanhooren, Wim Dobbelaere, Georges G. E. Gielen |
| 2019 | DATE | Review of Methodologies for Pre- and Post-Silicon Analog Verification in Mixed-Signal SOCs. | Georges G. E. Gielen, Nektar Xama, Karthik Ganesan, Subhasish Mitra |
| 2019 | ITC | Applying Vstress and defect activation coverage to produce zero-defect mixed-signal automotive ICs. | Wim Dobbelaere, Frederik Colle, Anthony Coyette, Ronny Vanhooren, Nektar Xama, Jhon Gomez, Georges G. E. Gielen |
| 2018 | ISCAS | Methodology Towards Sub-ppm Testing of Analog and Mixed-Signal ICs for Cyber-Physical Systems. | Georges G. E. Gielen, Baris Esen, Wim Dobbelaere, Ronny Vanhooren, Anthony Coyette, Nektar Xama |
| 2017 | ETS | A very low cost and highly parallel DfT method for analog and mixed-signal circuits. | Baris Esen, Anthony Coyette, Nektar Xama, Wim Dobbelaere, Ronny Vanhooren, Georges G. E. Gielen |
| 2017 | ETS | Automatic testing of analog ICs for latent defects using topology modification. | Nektar Xama, Anthony Coyette, Baris Esen, Wim Dobbelaere, Ronny Vanhooren, Georges G. E. Gielen |
| 2017 | ITC | Non-intrusive detection of defects in mixed-signal integrated circuits using light activation. | Baris Esen, Anthony Coyette, Nektar Xama, Wim Dobbelaere, Ronny Vanhooren, Georges G. E. Gielen |
| 2016 | CEC | A surrogate model assisted evolutionary algorithm for computationally expensive design optimization problems with discrete variables. | Bo Liu, Nan Sun, Qingfu Zhang, Vic Grout, Georges G. E. Gielen |
| 2016 | ITC | Automatic test signal generation for mixed-signal integrated circuits using circuit partitioning and interval analysis. | Anthony Coyette, Baris Esen, Wim Dobbelaere, Ronny Vanhooren, Georges G. E. Gielen |
| 2016 | ITC | Analog fault coverage improvement using final-test dynamic part average testing. | Wim Dobbelaere, Ronny Vanhooren, Willy De Man, Koen Matthijs, Anthony Coyette, Baris Esen, Georges G. E. Gielen |
| 2016 | ITC | Effective DC fault models and testing approach for open defects in analog circuits. | Baris Esen, Anthony Coyette, Georges G. E. Gielen, Wim Dobbelaere, Ronny Vanhooren |
| 2015 | ETS | Automatic generation of autonomous built-in observability structures for analog circuits. | Anthony Coyette, Baris Esen, Ronny Vanhooren, Wim Dobbelaere, Georges G. E. Gielen |
| 2015 | ISCAS | Time-based sensor interface circuits in carbon nanotube technology. | Georges G. E. Gielen, Jelle Van Rethy, Max M. Shulaker, Gage Hills, H.-S. Philip Wong, Subhasish Mitra |
| 2015 | VTS | Automated testing of mixed-signal integrated circuits by topology modification. | Anthony Coyette, Baris Esen, Ronny Vanhooren, Wim Dobbelaere, Georges G. E. Gielen |
| 2014 | ASPDAC | "All Programmable SOC FPGA for networking and computing in big data infrastructure". | Ivo Bolsens, Georges G. E. Gielen, Kaushik Roy, Ulf Schneider |
| 2014 | CEC | Behavioral study of the surrogate model-aware evolutionary search framework. | Bo Liu, Qin Chen, Qingfu Zhang, Georges G. E. Gielen, Vic Grout |
| 2014 | CEC | Network on Chip optimization based on surrogate model assisted evolutionary algorithms. | Mengyuan Wu, Ammar Karkar, Bo Liu, Alex Yakovlev, Georges G. E. Gielen, Vic Grout |
| 2014 | ETS | Optimization of analog fault coverage by exploiting defect-specific masking. | Anthony Coyette, Georges G. E. Gielen, Ronny Vanhooren, Wim Dobbelaere |
| 2014 | ISCAS | Design of a frequency reference based on a PVT-independent transmission line delay. | Florian De Roose, Valentijn De Smedt, Wouter Volkaerts, Michiel Steyaert, Georges G. E. Gielen, Patrick Reynaert, Wim Dehaene |
| 2014 | ITC | Design and test of analog circuits towards sub-ppm level. | Georges G. E. Gielen, Wim Dobbelaere, Ronny Vanhooren, Anthony Coyette, Baris Esen |
| 2013 | DAC | Sacha: the Stanford carbon nanotube controlled handshaking robot. | Max M. Shulaker, Jelle Van Rethy, Gage Hills, Hong-Yu Chen, Georges G. E. Gielen, H.-S. Philip Wong, Subhasish Mitra |
| 2013 | DATE | Stochastic degradation modeling and simulation for analog integrated circuits in nanometer CMOS. | Georges G. E. Gielen, Elie Maricau |
| 2013 | DATE | Extracting analytical nonlinear models from analog circuits by recursive vector fitting of transfer function trajectories. | Dimitri de Jonghe, Dirk Deschrijver, Tom Dhaene, Georges G. E. Gielen |
| 2013 | DATE | A low-power and low-voltage BBPLL-based sensor interface in 130nm CMOS for wireless sensor networks. | Jelle Van Rethy, Hans Danneels, Valentijn De Smedt, Wim Dehaene, Georges G. E. Gielen |
| 2012 | CEC | Self-adaptive lower confidence bound: A new general and effective prescreening method for Gaussian Process surrogate model assisted evolutionary algorithms. | Bo Liu, Qingfu Zhang, Francisco V. Fernndez, Georges G. E. Gielen |
| 2012 | DAC | Efficient multi-objective synthesis for microwave components based on computational intelligence techniques. | Bo Liu, Hadi Aliakbarian, Soheil Radiom, Guy A. E. Vandenbosch, Georges G. E. Gielen |
| 2012 | DATE | Design of an intrinsically-linear double-VCO-based ADC with 2 | Peng Gao, Xinpeng Xing, Jan Craninckx, Georges G. E. Gielen |
| 2012 | DATE | Advances in variation-aware modeling, verification, and testing of analog ICs. | Dimitri de Jonghe, Elie Maricau, Georges G. E. Gielen, Trent McConaghy, Bratislav Tasic, Haralampos-G. D. Stratigopoulos |
| 2012 | DATE | A fast analog circuit yield estimation method for medium and high dimensional problems. | Bo Liu, Jarir Messaoudi, Georges G. E. Gielen |
| 2012 | DATE | Hierarchical analog circuit reliability analysis using multivariate nonlinear regression and active learning sample selection. | Elie Maricau, Dimitri de Jonghe, Georges G. E. Gielen |
| 2012 | DATE | Impact of TSV area on the dynamic range and frame rate performance of 3D-integrated image sensors. | Adi Xhakoni, David San Segundo Bello, Georges G. E. Gielen |
| 2011 | DATE | Analog circuit reliability in sub-32 nanometer CMOS: Analysis and mitigation. | Georges G. E. Gielen, Elie Maricau, Pieter De Wit |
| 2011 | DATE | Global optimization of integrated transformers for high frequency microwave circuits using a Gaussian process based surrogate model. | Bo Liu, Ying He, Patrick Reynaert, Georges G. E. Gielen |
| 2011 | DATE | Systematic design of a programmable low-noise CMOS neural interface for cell activity recording. | Carolina Mora Lopez, Silke Musa, Carmen Bartic, Robert Puers, Georges G. E. Gielen, Wolfgang Eberle |
| 2011 | DATE | Stochastic circuit reliability analysis. | Elie Maricau, Georges G. E. Gielen |
| 2011 | ICCAD | Efficient analytical macromodeling of large analog circuits by Transfer Function Trajectories. | Dimitri de Jonghe, Georges G. E. Gielen |
| 2011 | ISCAS | Circuits and systems engineering education through interdisciplinary team-based design projects. | Wim Dehaene, Georges G. E. Gielen, Geert Deconinck, Johan Driesen, Marc Moonen, Bart Nauwelaers, Chris Van Hoof, Patrick Wambacq |
| 2011 | ISCAS | A novel operating-point driven method for the sizing of analog IC. | Bo Liu, Murat Pak, Xuezhi Zheng, Georges G. E. Gielen |
| 2011 | ISCAS | A 16-channel low-noise programmable system for the recording of neural signals. | Carolina Mora Lopez, Dries Braeken, Carmen Bartic, Robert Puers, Georges G. E. Gielen, Wolfgang Eberle |
| 2010 | CEC | An enhanced MOEA/D-DE and its application to multiobjective analog cell sizing. | Bo Liu, Francisco V. Fernndez, Qingfu Zhang, Murat Pak, Suha Sipahi, Georges G. E. Gielen |
| 2010 | DATE | An accurate and efficient yield optimization method for analog circuits based on computing budget allocation and memetic search technique. | Bo Liu, Francisco V. Fernndez, Georges G. E. Gielen |
| 2010 | DATE | Variability-aware reliability simulation of mixed-signal ICs with quasi-linear complexity. | Elie Maricau, Georges G. E. Gielen |
| 2010 | ICCAD | Design automation towards reliable analog integrated circuits. | Georges G. E. Gielen, Elie Maricau, Pieter De Wit |
| 2010 | ISCAS | A 0.5 V-1.4 V supply-independent frequency-based analog-to-digital converter with fast start-up time for wireless sensor networks. | Wouter Volkaerts, Bart Marien, Hans Danneels, Valentijn De Smedt, Patrick Reynaert, Wim Dehaene, Georges G. E. Gielen |
| 2010 | ISCAS | Efficient simulation model for DAC dynamic properties. | Pieter De Wit, Georges G. E. Gielen |
| 2009 | CEC | Fuzzy selection based differential evolution algorithm for analog cell sizing capturing imprecise human intentions. | Bo Liu, Francisco V. Fernndez, Georges G. E. Gielen |
| 2009 | DAC | Guess, solder, measure, repeat: how do I get my mixed-signal chip right? | Geoffrey Ying, Andreas Kuehlmann, Kenneth S. Kundert, Georges G. E. Gielen, Eric Grimme, Martin O'Leary, Sandeep Tare, Warren Wong |
| 2009 | DATE | Health-care electronics The market, the challenges, the progress. | Wolfgang Eberle, Ashwin S. Mecheri, Thi Kim Thoa Nguyen, Georges G. E. Gielen, Raymond Campagnolo, Alison J. Burdett, Chris Toumazou, Bart Volckaerts |
| 2009 | DATE | A design methodology for fully reconfigurable Delta-Sigma data converters. | Yi Ke, Jan Craninckx, Georges G. E. Gielen |
| 2009 | DATE | Efficient reliability simulation of analog ICs including variability and time-varying stress. | Elie Maricau, Georges G. E. Gielen |
| 2009 | DATE | Massively multi-topology sizing of analog integrated circuits. | Pieter Palmers, Trent McConaghy, Michiel Steyaert, Georges G. E. Gielen |
| 2009 | DDECS | Design tools and circuit solutions for degradation-resilient analog circuits in nanometer CMOS. | Georges G. E. Gielen |
| 2009 | IOLTS | A methodology for measuring transistor ageing effects towards accurate reliability simulation. | Elie Maricau, Georges G. E. Gielen |
| 2009 | ISCAS | Prediction of Non-uniform Sampling Distortion Due to Substrate Noise Coupling in Regenerative Comparators. | Athanasios Stefanou, Georges G. E. Gielen |
| 2008 | DATE | From Transistor to PLL - Analogue Design and EDA Methods. | David M. Binkley, Helmut E. Graeb, Georges G. E. Gielen, Jaijeet S. Roychowdhury |
| 2008 | DATE | Emerging Yield and Reliability Challenges in Nanometer CMOS Technologies. | Georges G. E. Gielen, Pieter De Wit, Elie Maricau, Johan Loeckx, Javier Martn-Martnez, Ben Kaczer, Guido Groeseneken, Rosana Rodrguez, Montserrat Nafra |
| 2008 | ICCAD | Importance sampled circuit learning ensembles for robust analog IC design. | Peng Gao, Trent McConaghy, Georges G. E. Gielen |
| 2008 | ICCAD | Automated extraction of expert knowledge in analog topology selection and sizing. | Trent McConaghy, Pieter Palmers, Georges G. E. Gielen, Michiel Steyaert |
| 2008 | ISCAS | A low-power mixing DAC IR-UWB-receiver. | Hans Danneels, Marian Verhelst, Pieter Palmers, Wim Vereecken, Bruno Boury, Wim Dehaene, Michiel Steyaert, Georges G. E. Gielen |
| 2007 | ASPDAC | Design tool solutions for mixed-signal/RF circuit design in CMOS nanometer technologies. | Georges G. E. Gielen |
| 2007 | DAC | Simultaneous Multi-Topology Multi-Objective Sizing Across Thousands of Analog Circuit Topologies. | Trent McConaghy, Pieter Palmers, Georges G. E. Gielen, Michiel Steyaert |
| 2007 | DATE | An efficient methodology for hierarchical synthesis of mixed-signal systems with fully integrated building block topology selection. | Tom Eeckelaert, Raf Schoofs, Georges G. E. Gielen, Michiel Steyaert, Willy M. C. Sansen |
| 2007 | ISCAS | Scalable Gate-Level Models for Power and Timing Analysis. | Mustafa Badaroglu, Geert Van der Plas, Piet Wambacq, Stphane Donnay, Georges G. E. Gielen, Hugo De Man |
| 2006 | DAC | Hierarchical bottom--up analog optimization methodology validated by a delta-sigma A/D converter design for the 802.11a/b/g standard. | Tom Eeckelaert, Raf Schoofs, Georges G. E. Gielen, Michiel Steyaert, Willy M. C. Sansen |
| 2006 | DATE | Top-down heterogeneous synthesis of analog and mixed-signal systems. | Ewout Martens, Georges G. E. Gielen |
| 2006 | DATE | Double-strength CAFFEINE: fast template-free symbolic modeling of analog circuits via implicit canonical form functions and explicit introns. | Trent McConaghy, Georges G. E. Gielen |
| 2006 | FDL | Generic Behavioral Modeling of Analog and Mixed-Signal Systems. | Ewout Martens, Georges G. E. Gielen |
| 2006 | GECCO | Canonical form functions as a simple means for genetic programming to evolve human-interpretable functions. | Trent McConaghy, Georges G. E. Gielen |
| 2006 | ICCAD | Automation in mixed-signal design: challenges and solutions in the wake of the nano era. | Trent McConaghy, Georges G. E. Gielen |
| 2006 | ISCAS | Assessment of parameter extraction methods for integrated inductor design and model validation. | Alkis A. Hatzopoulos, Stefanos Stefanou, Georges G. E. Gielen, Dominique Schreurs |
| 2006 | ISCAS | A behavioral model of sampled-data systems in the phase-frequency transfer domain for architectural exploration of transceivers. | Ewout Martens, Georges G. E. Gielen |
| 2005 | ASPDAC | Efficient symbolic sensitivity analysis of analog circuits using element-coefficient diagrams. | Huiying Yang, Mukesh Ranjan, Wim Verhaegen, Mengmeng Ding, Ranga Vemuri, Georges G. E. Gielen |
| 2005 | DAC | Performance space modeling for hierarchical synthesis of analog integrated circuits. | Georges G. E. Gielen, Trent McConaghy, Tom Eeckelaert |
| 2005 | DATE | Efficient Multiobjective Synthesis of Analog Circuits using Hierarchical Pareto-Optimal Performance Hypersurfaces. | Tom Eeckelaert, Trent McConaghy, Georges G. E. Gielen |
| 2005 | DATE | Analog and Digital Circuit Design in 65 nm CMOS: End of the Road? | Georges G. E. Gielen, Wim Dehaene, Phillip Christie, Dieter Draxelmayr, Edmond Janssens, Karen Maex, Ted Vucurevich |
| 2005 | DATE | Time-Domain Simulation of Sampled Weakly Nonlinear Systems Using Analytical Integration and Orthogonal Polynomial Series. | Ewout Martens, Georges G. E. Gielen |
| 2005 | DATE | CAFFEINE: Template-Free Symbolic Model Generation of Analog Circuits via Canonical Form Functions and Genetic Programming. | Trent McConaghy, Tom Eeckelaert, Georges G. E. Gielen |
| 2005 | ISCAS | Behavioral modeling and simulation of weakly nonlinear sampled-data systems. | Ewout Martens, Georges G. E. Gielen |
| 2005 | ISCAS | Analysis of simulation-driven numerical performance modeling techniques for application to analog circuit optimization. | Trent McConaghy, Georges G. E. Gielen |
| 2005 | ISCAS | IBMG: interpretable behavioral model generator for nonlinear analog circuits via canonical form functions and genetic programming. | Trent McConaghy, Georges G. E. Gielen |
| 2004 | ASPDAC | High-level modeling of continuous-time Delta-Sigma A/D-converters using formal models. | Ewout Martens, Georges G. E. Gielen |
| 2004 | DAC | High-level simulation of substrate noise in high-ohmic substrates with interconnect and supply effects. | Geert Van der Plas, Mustafa Badaroglu, Gerd Vandersteen, Petr Dobrovoln, Piet Wambacq, Stphane Donnay, Georges G. E. Gielen, Hugo De Man |
| 2004 | DATE | Digital Ground Bounce Reduction by Phase Modulation of the Clock. | Mustafa Badaroglu, Piet Wambacq, Geert Van der Plas, Stphane Donnay, Georges G. E. Gielen, Hugo De Man |
| 2004 | DATE | Performance Modeling of Analog Integrated Circuits Using Least-Squares Support Vector Machines. | Tholom Kiely, Georges G. E. Gielen |
| 2004 | DATE | A Phase-Frequency Transfer Description of Analog and Mixed-Signal Front-End Architectures for System-Level Design. | Ewout Martens, Georges G. E. Gielen |
| 2004 | DATE | Fast, Layout-Inclusive Analog Circuit Synthesis using Pre-Compiled Parasitic-Aware Symbolic Performance Models. | Mukesh Ranjan, Wim Verhaegen, Anuradha Agarwal, Hemanth Sampath, Ranga Vemuri, Georges G. E. Gielen |
| 2004 | ISCAS | Modelling of the impact of the current source output impedance on the SFDR of current-steering CMOS D/A converters. | Tao Chen, Georges G. E. Gielen |
| 2004 | ISCAS | Knowledge- and optimization-based design of RF power amplifiers. | Joo Ramos, Kenneth Francken, Georges G. E. Gielen, Michiel Steyaert |
| 2004 | ISNN | Backpropagation Analysis of the Limited Precision on High-Order Function Neural Networks. | Minghu Jiang, Georges G. E. Gielen |
| 2004 | ISNN | A Bayesian Classifier by Using the Adaptive Construct Algorithm of the RBF Networks. | Minghu Jiang, Dafan Liu, Beixing Deng, Georges G. E. Gielen |
| 2003 | DAC | Architectural selection of A/D converters. | Martin Vogels, Georges G. E. Gielen |
| 2003 | DATE | Behavioral Modeling and Simulation of a Mixed Analog/Digital Automatic Gain Control Loop in a 5 GHz WLAN Receiver. | Wolfgang Eberle, Gerd Vandersteen, Piet Wambacq, Stphane Donnay, Georges G. E. Gielen, Hugo De Man |
| 2003 | DATE | Generalized Posynomial Performance Modeling. | Tom Eeckelaert, Walter Daems, Georges G. E. Gielen, Willy M. C. Sansen |
| 2003 | DATE | A Model of Computation for Continuous-Time ?-? Modulators. | Ewout Martens, Georges G. E. Gielen |
| 2003 | DATE | HOLMES: Capturing the Yield-Optimized Design Space Boundaries of Analog and RF Integrated Circuits. | Bart De Smedt, Georges G. E. Gielen |
| 2003 | DATE | Time-Varying, Frequency-Domain Modeling and Analysis of Phase-Locked Loops with Sampling Phase-Frequency Detectors. | Piet Vanassche, Georges G. E. Gielen, Willy M. C. Sansen |
| 2003 | DATE | Figure of Merit Based Selection of A/D Converters. | Martin Vogels, Georges G. E. Gielen |
| 2003 | ICCAD | A Generalized Method for Computing Oscillator Phase Noise Spectra. | Piet Vanassche, Georges G. E. Gielen, Willy M. C. Sansen |
| 2003 | ISCAS | Analysis of the dynamic SFDR property of high-accuracy current-steering D/A converters. | Tao Chen, Georges G. E. Gielen |
| 2002 | DAC | Clock tree optimization in synchronous CMOS digital circuits for substrate noise reduction using folding of supply current transients. | Mustafa Badaroglu, Kris Tiri, Stphane Donnay, Piet Wambacq, Hugo De Man, Ingrid Verbauwhede, Georges G. E. Gielen |
| 2002 | DAC | Optimal design of delta-sigma ADCs by design space exploration. | Ovidiu Bajdechi, Johan H. Huijsing, Georges G. E. Gielen |
| 2002 | DAC | An efficient optimization--based technique to generate posynomial performance models for analog integrated circuits. | Walter Daems, Georges G. E. Gielen, Willy M. C. Sansen |
| 2002 | DAC | Behavioral modeling of (coupled) harmonic oscillators. | Piet Vanassche, Georges G. E. Gielen, Willy M. C. Sansen |
| 2002 | DAC | Systematic design of a 200 MS/s 8-bit interpolating/averaging A/D converter. | Jan Vandenbussche, Koen Uyttenhove, Erik Lauwers, Michiel Steyaert, Georges G. E. Gielen |
| 2002 | DATE | A Fitting Approach to Generate Symbolic Expressions for Linear and Nonlinear Analog Circuit Performance Characteristics. | Walter Daems, Georges G. E. Gielen, Willy M. C. Sansen |
| 2002 | DATE | DAISY-CT: A High-Level Simulation Tool for Continuous-Time Delta Sigma Modulators. | Kenneth Francken, Martin Vogels, Ewout Martens, Georges G. E. Gielen |
| 2002 | DATE | Constructing Symbolic Models for the Input/Output Behavior of Periodically Time-Varying Systems Using Harmonic Transfer Matrices. | Piet Vanassche, Georges G. E. Gielen, Willy M. C. Sansen |
| 2002 | DATE | Systematic Design of a 200 Ms/S 8-bit Interpolating A/D Converter. | Jan Vandenbussche, Erik Lauwers, Koen Uyttenhove, Michiel Steyaert, Georges G. E. Gielen |
| 2002 | ICCAD | A behavioral simulation tool for continuous-time delta sigma modulators. | Kenneth Francken, Martin Vogels, Ewout Martens, Georges G. E. Gielen |
| 2002 | ICCAD | On the difference between two widely publicized methods for analyzing oscillator phase behavior. | Piet Vanassche, Georges G. E. Gielen, Willy M. C. Sansen |
| 2002 | ISCAS | Regression criteria and their application in different modeling cases. | Francky Leyn, Erik Lauwers, Martin Vogels, Georges G. E. Gielen, Willy M. C. Sansen |
| 2002 | ISCAS | Efficient time-domain simulation of continuous-time Delta-Sigma A/D converters using analytical integration. | Martin Vogels, Kenneth Francken, Ewout Martens, Georges G. E. Gielen |
| 2001 | DAC | Panel: When Will the Analog Design Flow Catch Up with Digital Methodology? | Georges G. E. Gielen, Mike Sottak, Mike Murray, Linda Kaye, Maria del Mar Hershenson, Kenneth S. Kundert, Philippe Magarshack, Akria Matsuzawa, Ronald A. Rohrer, Ping Yang |
| 2001 | DAC | Efficient DDD-based Symbolic Analysis of Large Linear Analog Circuits. | Wim Verhaegen, Georges G. E. Gielen |
| 2001 | DATE | High-level simulation of substrate noise generation from large digital circuits with multiple supplies. | Mustafa Badaroglu, Marc van Heijningen, Vincent Gravot, Stphane Donnay, Hugo De Man, Georges G. E. Gielen, Marc Engels, Ivo Bolsens |
| 2001 | DATE | Design challenges and emerging EDA solutions in mixed-signal IC design. | Georges G. E. Gielen |
| 2001 | DATE | Efficient time-domain simulation of telecom frontends using a complex damped exponential signal model. | Piet Vanassche, Georges G. E. Gielen, Willy M. C. Sansen |
| 2001 | ICCAD | Simulation-Based Automatic Generation of Signomial and Posynomial Performance Models for Analog Integrated Circuit Sizing. | Walter Daems, Georges G. E. Gielen, Willy M. C. Sansen |
| 2001 | ICCAD | Embedded Tutorial: CAD Solutions and Outstanding Challenges for Mixed-Signal and RF IC Design. | Domine Leenaerts, Rob A. Rutenbar, Georges G. E. Gielen |
| 2001 | ICCAD | A Layout-Aware Synthesis Methodology for RF Circuits. | Peter J. Vancorenland, Geert Van der Plas, Michiel Steyaert, Georges G. E. Gielen, Willy M. C. Sansen |
| 2000 | DAC | Survival strategies for mixed-signal systems-on-chip (panel session). | Stephan Ohr, Rob A. Rutenbar, Henry Chang, Georges G. E. Gielen, Rudolf Koch, Roy McGuffin, K. C. Murphy |
| 2000 | DAC | Systematic design of a 14-bit 150-MS/s CMOS current-steering D/A converter. | Geert Van der Plas, Jan Vandenbussche, Walter Daems, Antal van den Bosch, Georges G. E. Gielen, Willy M. C. Sansen |
| 2000 | DAC | CYCLONE: automated design and layout of RF LC-oscillators. | Carl De Ranter, Bram De Muer, Geert Van der Plas, Peter J. Vancorenland, Michiel Steyaert, Georges G. E. Gielen, Willy M. C. Sansen |
| 2000 | DAC | Optimal RF design using smart evolutionary algorithms. | Peter J. Vancorenland, Carl De Ranter, Michiel Steyaert, Georges G. E. Gielen |
| 2000 | ICCAD | DAISY: A Simulation-Based High-Level Synthesis Tool for Delta-Sigma Modulators. | Kenneth Francken, Peter J. Vancorenland, Georges G. E. Gielen |
| 2000 | ICCAD | ACTIF: A High-Level Power Estimation Tool for Analog Continuous-Time-Filters. | Erik Lauwers, Georges G. E. Gielen |
| 2000 | ISCAS | Efficient analysis of the stability of sigma-delta modulators using wavelets. | Martin Vogels, Georges G. E. Gielen |
| 1999 | DAC | Circuit Complexity Reduction for Symbolic Analysis of Analog Integrated Circuits. | Walter Daems, Georges G. E. Gielen, Willy M. C. Sansen |
| 1999 | DATE | A Power Estimation Model for High-Speed CMOS A/D Converters. | Erik Lauwers, Georges G. E. Gielen |
| 1999 | ISCAS | Methodology for analog technology porting including performance tuning. | Kenneth Francken, Georges G. E. Gielen |
| 1998 | DATE | Hierarchical Top-Down Design of Analog Sensor Interfaces: From System-Level Specifications Down to Silicon. | Jan Vandenbussche, Stphane Donnay, Francky Leyn, Georges G. E. Gielen, Willy M. C. Sansen |
| 1998 | ICCAD | Efficient analog circuit synthesis with simultaneous yield and robustness optimization. | Geert Debyser, Georges G. E. Gielen |
| 1998 | ICCAD | An efficient DC root solving algorithm with guaranteed convergence for analog integrated CMOS circuits. | Francky Leyn, Georges G. E. Gielen, Willy M. C. Sansen |
| 1997 | DATE | High-level synthesis of analog sensor interface front-ends. | Stphane Donnay, Georges G. E. Gielen, Willy M. C. Sansen, Wim Kruiskamp, Domine Leenaerts, W. van Bokhoven |
| 1997 | ICCAD | A behavioral signal path modeling methodology for qualitative insight in and efficient sizing of CMOS opamps. | Francky Leyn, Walter Daems, Georges G. E. Gielen, Willy M. C. Sansen |
| 1997 | VTS | Automated test pattern generation for analog integrated circuits. | Wim Verhaegen, Geert Van der Plas, Georges G. E. Gielen |
| 1996 | DAC | Synthesis Tools for Mixed-Signal ICs: Progress on Frontend and Backend Strategies. | L. Richard Carley, Georges G. E. Gielen, Rob A. Rutenbar, Willy M. C. Sansen |
| 1995 | DAC | Direct Performance-Driven Placement of Mismatch-Sensitive Analog Circuits. | Koen Lampaert, Georges G. E. Gielen, Willy M. C. Sansen |
| 1995 | DATE | A flexible topology selection program as part of an analog synthesis system. | Petar Veselinovic, Domine Leenaerts, W. van Bokhoven, Francky Leyn, F. Proesmans, Georges G. E. Gielen, Willy Sansen |
| 1995 | ICCAD | A high-level design and optimization tool for analog RF receiver front-ends. | Jan Crols, Stphane Donnay, Michiel Steyaert, Georges G. E. Gielen |
| 1995 | ISCAS | Use of Symbolic Analysis in Analog Circuit Synthesis. | Georges G. E. Gielen, Geert Debyser, Piet Wambacq, Koen Swings, Willy M. C. Sansen |
| 1994 | ICCAD | Fault detection and input stimulus determination for the testing of analog integrated circuits based on power-supply current monitoring. | Georges G. E. Gielen, Zhihua Wang, Willy M. C. Sansen |
| 1994 | ISCAS | Pleasures, Perils and Pitfalls of Symbolic Analysis. | Francisco V. Fernndez, Georges G. E. Gielen, Lawrence Huelsman, Agnieszka Konczykowska, Stefano Manetti, Willy M. C. Sansen, Jir Vlach |
| 1994 | ISCAS | Symbolic Analysis of Large Analog Integrated Circuits by Approximation During Expression Generation. | Francisco V. Fernndez, Piet Wambacq, Georges G. E. Gielen, ngel Rodrguez-Vzquez, Willy M. C. Sansen |
| 1994 | ISCAS | A Novel Method for the Fault Detection of Analog Integrated Circuits. | Zhihua Wang, Georges G. E. Gielen, Willy M. C. Sansen |
| 1993 | ISCAS | Modeling of the Power-supply Interactions of CMOS Operational Amplifiers Using Symbolic Computation. | Georges G. E. Gielen, Willy M. C. Sansen |
| 1991 | ICCAD | A Behavioral Representation for Nyquist Rate A/D Converters. | Edward W. Y. Liu, Alberto L. Sangiovanni-Vincentelli, Georges G. E. Gielen, Paul R. Gray |