| 2017 | ASPDAC | ASP-DAC 2017 keynote speech I-3: Design of society: Beyond digital system design. | Hiroto Yasuura |
| 2012 | IOLTS | Neutron-induced soft error rate estimation for SRAM using PHITS. | Shusuke Yoshimoto, Takuro Amashita, Masayoshi Yoshimura, Yusuke Matsunaga, Hiroto Yasuura, Shintaro Izumi, Hiroshi Kawaguchi, Masahiko Yoshimoto |
| 2011 | IOLTS | Multiple-bit-upset and single-bit-upset resilient 8T SRAM bitcell layout with divided wordline structure. | Shusuke Yoshimoto, Takuro Amashita, D. Kozuwa, Taiga Takata, Masayoshi Yoshimura, Yusuke Matsunaga, Hiroto Yasuura, Hiroshi Kawaguchi, Masahiko Yoshimoto |
| 2010 | AINA | An Information Platform for Low-Literate Villagers. | Ashir Ahmed, Lutfe Kabir, Hiroto Yasuura |
| 2010 | ICCSA | An Identifiable Yet Unlinkable Authentication System with Smart Cards for Multiple Services. | Toru Nakamura, Shunsuke Inenaga, Daisuke Ikeda, Kensuke Baba, Hiroto Yasuura |
| 2010 | PRDC | A Replacement Strategy for Canary Flip-Flops. | Yuji Kunitake, Toshinori Sato, Hiroto Yasuura |
| 2009 | ASPDAC | Dependable VLSI: device, design and architecture: how should they cooperate? | Shuichi Sakai, Hidetoshi Onodera, Hiroto Yasuura, James C. Hoe |
| 2009 | CSEDU | Large Scale Business-academia Collaboration in Master Education Course. | Noriaki Sakamoto, Mitsuaki Fukase, Tsunenori Mine, Shigeru Kusakabe, Tsuneo Nakanishi, Yoichi Omori, Mohammad Mesbah Uddin, Keijiro Araki, Akira Fukuda, Hiroto Yasuura, Teruaki Kitasuka |
| 2009 | PDPTA | Modeling Costs of Access Control with Various Key Management Systems. | Tomomi Yamasaki, Shunsuke Inenaga, Daisuke Ikeda, Hiroto Yasuura |
| 2008 | SECRYPT | A Note on Biometrics-based Authentication with Portable Device. | Shinsuke Ohtsuka, Satoshi Kawamoto, Shigeru Takano, Kensuke Baba, Hiroto Yasuura |
| 2007 | ASPDAC | A Software Technique to Improve Yield of Processor Chips in Presence of Ultra-Leaky SRAM Cells Caused by Process Variation. | Maziar Goudarzi, Tohru Ishihara, Hiroto Yasuura |
| 2007 | PERCOM | Unlinkability and Real World Constraints in RFID Systems. | Yasunobu Nohara, Sozo Inoue, Hiroto Yasuura |
| 2006 | PERCOM | On Authentication between Human and Computer. | Takahiro Watanabe, Yasunobu Nohara, Kensuke Baba, Sozo Inoue, Hiroto Yasuura |
| 2005 | ASPDAC | A variation-aware low-power coding methodology for tightly coupled buses. | Masanori Muroyama, Kosuke Tarumi, Koji Makiyama, Hiroto Yasuura |
| 2005 | PERCOM | Toward Unlinkable ID Management for Multi-Service Environments. | Yasunobu Nohara, Sozo Inoue, Hiroto Yasuura |
| 2003 | ASPDAC | Quality-driven design by bitwidth optimization for video applications. | Yun Cao, Hiroto Yasuura |
| 2003 | ASPDAC | Reduction of crosstalk noise by optimizing 3-D configuration of the routing grid. | Atsushi Sakai, Takashi Yamada, Yoshifumi Matsushita, Hiroto Yasuura |
| 2003 | DSD | A Power Reduction Scheme for Data Buses by Dynamic Detection of Active Bits. | Masanori Muroyama, Akihiko Hyodo, Takanori Okuma, Hiroto Yasuura |
| 2003 | DSD | Towards the Digitally Named World -Challenges for New Social Infrastructures based on Information Technologies. | Hiroto Yasuura |
| 2002 | DSD | A Design for a Low-Power Digital Matched Filter Applicable to W-CDMA. | Shoji Goto, Takashi Yamada, Norihisa Takayarna, Yoshifumi Matsushita, Yasoo Harada, Hiroto Yasuura |
| 2002 | ISLPED | A low-power digital matched filter for spread-spectrum systems. | Shoji Goto, Takashi Yamada, Norihisa Takayama, Yoshifumi Matsushita, Yasoo Harada, Hiroto Yasuura |
| 2002 | ISLPED | Reducing access energy of on-chip data memory considering active data bitwidth. | Takanori Okuma, Yun Cao, Masanori Muroyama, Hiroto Yasuura |
| 2002 | ISLPED | Power analysis techniques for SoC with improved wiring models. | Takeshi Sakamoto, Takashi Yamada, Mamoru Mukuno, Yoshifumi Matsushita, Yasoo Harada, Hiroto Yasuura |
| 2002 | VLSID | A Power Minimization Technique for Arithmetic Circuits by Cell Selection. | Masanori Muroyama, Tohru Ishihara, Akihiko Hyodo, Hiroto Yasuura |
| 2002 | VLSID | Optimization of Test Accesses with a Combined BIST and External Test Scheme. | Makoto Sugihara, Hiroto Yasuura |
| 2001 | ISLPED | A system-level energy minimization approach using datapath width optimization. | Yun Cao, Hiroto Yasuura |
| 2000 | ASPDAC | One language or more?: how can we design an SoC at a system level? | Masaharu Imai, Gary Smith, Steven Schulz, Karen Bartleson, Daniel Gajski, Wolfgang Rosenstiel, Peter Flake, Hiroto Yasuura |
| 2000 | DATE | A Bus Delay Reduction Technique Considering Crosstalk. | Kei Hirose, Hiroto Yasuura |
| 2000 | DATE | A Power Reduction Technique with Object Code Merging for Application Specific Embedded Processors. | Tohru Ishihara, Hiroto Yasuura |
| 2000 | DATE | Analysis and Minimization of Test Time in a Combined BIST and External Test Approach. | Makoto Sugihara, Hiroto Yasuura, Hiroshi Date |
| 2000 | FPGA | An FPGA-based genetic algorithm machine (poster abstract). | Barry Shackleford, Etsuko Okushi, Mitsuhiro Yasuda, Hisao Koizumi, Katsuhiko Seo, Takashi Iwamoto, Hiroto Yasuura |
| 1998 | ASPDAC | Power-Pro: Programmable Power Management Architecture. | Tohru Ishihara, Hiroto Yasuura |
| 1998 | ASPDAC | Module Selection Using Manufacturing Information. | Hiroyuki Tomiyama, Hiroto Yasuura |
| 1998 | DATE | Instruction Scheduling for Power Reduction in Processor-Based System Design. | Hiroyuki Tomiyama, Tohru Ishihara, Akihiko Inoue, Hiroto Yasuura |
| 1998 | ISLPED | Voltage scheduling problem for dynamically variable voltage processors. | Tohru Ishihara, Hiroto Yasuura |
| 1998 | ITC | A novel test methodology for core-based system LSIs and a testing time minimization problem. | Makoto Sugihara, Hiroshi Date, Hiroto Yasuura |
| 1997 | DAC | Memory-CPU Size Optimization for Embedded System Designs. | Barry Shackleford, Mitsuhiro Yasuda, Etsuko Okushi, Hisao Koizumi, Hiroyuki Tomiyama, Hiroto Yasuura |
| 1997 | ICONIP | A High-Performance Hardware Implementation of a Survival-Based Genetic Algorithm. | Barry Shackleford, Etsuko Okushi, Mitsuhiro Yasuda, Hisao Koizumi, Katsuhiko Seo, Takashi Iwamoto, Hiroto Yasuura |
| 1996 | DATE | Optimal Code Placement of Embedded Software for Instruction Caches. | Hiroyuki Tomiyama, Hiroto Yasuura |
| 1996 | ISLPED | Basic experimentation on accuracy of power estimation for CMOS VLSI circuits. | Tohru Ishihara, Hiroto Yasuura |
| 1994 | DAC | Design Reuse: Fact or Fiction? (Panel). | Nikil D. Dutt, David Agnew, Raul Camposano, Antun Domic, Manfred Wiesel, Hiroto Yasuura |
| 1993 | ICS | A Micro-Vectorprocessor Architecture: Performance Modeling and Benchmarking. | Takashi Hashimoto, Kazuaki J. Murakami, Tetsuo Hironaka, Hiroto Yasuura |
| 1990 | DAC | NES: The Behavioral Model for the Formal Semantics of a Hardware Design Language UDL/I. | Nagisa Ishiura, Hiroto Yasuura, Shuzo Yajima |
| 1990 | ICCAD | Extraction of Functional Information from Combinatorial Circuits. | M. Ohmura, Hiroto Yasuura, Keikichi Tamaru |
| 1990 | ICCD | Formal semantics of UDL/I and its applications to CAD/DA tools. | Hiroto Yasuura, Nagisa Ishiura |
| 1989 | CONCUR | Locally Computable Coding for Unary Operations. | Hiroto Yasuura |
| 1989 | DAC | Semantics of a Hardware Design Language for Japanese Standardization. | Hiroto Yasuura, Nagisa Ishiura |
| 1982 | DAC | An Interactive Simulation System for structured logic design - ISS. | Takeshi Sakai, Yoshiyuki Tsuchida, Hiroto Yasuura, Yasushi Ooi, Yoshitsugu Ono, Hiroshi Kano, Shinji Kimura, Shuzo Yajima |