| 2017 | ISCAS | Beyond SPICE. | Ibrahim N. Hajj |
| 2003 | DAC | Post-route gate sizing for crosstalk noise reduction. | Murat R. Becer, David T. Blaauw, Ilan Algor, Rajendran Panda, Chanhee Oh, Vladimir Zolotov, Ibrahim N. Hajj |
| 2002 | DATE | Analysis of Noise Avoidance Techniques in DSM Interconnects Using a Complete Crosstalk Noise Model . | Murat R. Becer, Vladimir Zolotov, David T. Blaauw, Rajendran Panda, Ibrahim N. Hajj |
| 2001 | DAC | Static Timing Analysis Including Power Supply Noise Effect on Propagation Delay in VLSI Circuits. | Geng Bai, Sudhakar Bobba, Ibrahim N. Hajj |
| 2001 | ISCAS | Input vector generation for maximum intrinsic decoupling capacitance of VLSI circuits. | Sudhakar Bobba, Ibrahim N. Hajj |
| 2001 | ISLPED | Maximum voltage variation in the power distribution network of VLSI circuits with RLC models. | Sudhakar Bobba, Ibrahim N. Hajj |
| 2000 | ICASSP | Peak current estimation for digital filters. | Sudhakar Bobba, Ibrahim N. Hajj |
| 2000 | ICCAD | Simulation and Optimization of the Power Distribution Network in VLSI Circuits. | Geng Bai, Sudhakar Bobba, Ibrahim N. Hajj |
| 2000 | ICCD | Current-Mode Threshold Logic Gates. | Sudhakar Bobba, Ibrahim N. Hajj |
| 1999 | ICCD | Energy and Performance Improvements in Microprocessor Design Using a Loop Cache. | Nikolaos Bellas, Ibrahim N. Hajj, Constantine D. Polychronopoulos, George D. Stamoulis |
| 1999 | ISCAS | An analytical, transistor-level energy model for SRAM-based caches. | Nikolaos Bellas, Ibrahim N. Hajj, Constantine D. Polychronopoulos |
| 1999 | ISCAS | A reduced-order scheme for coupled lumped-distributed interconnect simulation. | Ninglong Lu, Ibrahim N. Hajj |
| 1999 | ISCAS | Low-power distributed arithmetic architectures using nonuniform memory partitioning. | Sumant Ramprasad, Naresh R. Shanbhag, Ibrahim N. Hajj |
| 1999 | ISCAS | Correcting multiple design errors in digital VLSI circuits. | Andreas G. Veneris, Ibrahim N. Hajj |
| 1999 | ISLPED | Using dynamic cache management techniques to reduce energy in a high-performance processor. | Nikolaos Bellas, Ibrahim N. Hajj, Constantine D. Polychronopoulos |
| 1999 | ISLPED | An optimization technique for dual-output domino logic. | Sumant Ramprasad, Ibrahim N. Hajj, Farid N. Najm |
| 1999 | VLSID | Analytical Expressions for Power Dissipation of Macro-blocks in DSP Architectures. | Sudhakar Bobba, Ibrahim N. Hajj, Naresh R. Shanbhag |
| 1999 | VTS | Multiple Design Error Diagnosis and Correction in Digital VLSI Circuits. | Andreas G. Veneris, Ibrahim N. Hajj, Srikanth Venkataraman, W. Kent Fuchs |
| 1998 | ISLPED | Architectural and compiler support for energy reduction in the memory hierarchy of high performance microprocessors. | Nikolaos Bellas, Ibrahim N. Hajj, George D. Stamoulis, Constantine D. Polychronopoulos |
| 1998 | ISLPED | Decorrelating (DECOR) transformations for low-power adaptive filters. | Sumant Ramprasad, Naresh R. Shanbhag, Ibrahim N. Hajj |
| 1998 | VLSID | Coding for Low-Power Address and Data Busses: A Source-Coding Framework and Applications. | Sumant Ramprasad, Naresh R. Shanbhag, Ibrahim N. Hajj |
| 1997 | DAC | Analytical Estimation of Transition Activity From Word-Level Signal Statistics. | Sumant Ramprasad, Naresh R. Shanbhag, Ibrahim N. Hajj |
| 1997 | DATE | Monte-Carlo approach for power estimation in sequential circuits. | Vikram Saxena, Farid N. Najm, Ibrahim N. Hajj |
| 1997 | ICCAD | GOLDENGATE: a fast and accurate bridging fault simulator under a hybrid logic/IDDQ testing environment. | Tzuhao Chen, Ibrahim N. Hajj |
| 1997 | ICCAD | Achievable bounds on signal transition activity. | Sumant Ramprasad, Naresh R. Shanbhag, Ibrahim N. Hajj |
| 1996 | VTS | Genetic-algorithm-based test generation for current testing of bridging faults in CMOS VLSI circuits. | Terry Lee, Ibrahim N. Hajj, Elizabeth M. Rudnick, Janak H. Patel |
| 1995 | DAC | Power Estimation in Sequential Circuits. | Farid N. Najm, Shashank Goel, Ibrahim N. Hajj |
| 1994 | ICCAD | Delay and area optimization for compact placement by gate resizing and relocation. | Weitong Chuang, Ibrahim N. Hajj |
| 1994 | ISCAS | Improved Delay and Current Models for Estimating Maximum Currents in CMOS VLSI Circuits. | Harish Kriplani, Farid N. Najm, Ibrahim N. Hajj |
| 1994 | VTS | Circuit-level dictionaries of CMOS bridging faults. | Terry Lee, Weitong Chuang, Ibrahim N. Hajj, W. Kent Fuchs |
| 1993 | DAC | Diagnosis and Correction of Logic Design Errors in Digital Circuits. | Pi-Yu Chung, Yi-Min Wang, Ibrahim N. Hajj |
| 1993 | DAC | Resolving Signal Correlations for Estimating Maximum Currents in CMOS Combinational Circuits. | Harish Kriplani, Farid N. Najm, Ping Yang, Ibrahim N. Hajj |
| 1993 | DAC | Improved Techniques for Probabilistic Simulation Including Signal Correlation Effects. | Georgios I. Stamoulis, Ibrahim N. Hajj |
| 1993 | ICCAD | A unified algorithm for gate sizing and clock skew optimization to minimize sequential circuit area. | Weitong Chuang, Sachin S. Sapatnekar, Ibrahim N. Hajj |
| 1993 | ICCD | Computer-Aided Redesign of VLSI Circuits for Hot-Carrier Reliability. | Ping-Chung Li, Ibrahim N. Hajj |
| 1993 | ISCAS | Fast Mixed-Mode Simulation for Accurate MOS Bridging Fault Detection. | Weitong Chuang, Ibrahim N. Hajj |
| 1993 | ISCAS | Efficient Variable Ordering Heuristics for Shared ROBDD. | Pi-Yu Chung, Ibrahim N. Hajj, Janak H. Patel |
| 1992 | DAC | Maximum Current Estimation in CMOS Circuits. | Harish Kriplani, Farid N. Najm, Ibrahim N. Hajj |
| 1992 | ICCAD | A probabilistic timing approach to hot-carrier effect estimation. | Ping-Chung Li, Georgios I. Stamoulis, Ibrahim N. Hajj |
| 1992 | ITC | ACCORD: Automatic Catching and CORrection of Logic Design Errors in Combinatorial Circuits. | Pi-Yu Chung, Ibrahim N. Hajj |
| 1992 | VTS | Simulation of physical faults in VLSI circuits. | Ibrahim N. Hajj, Terry Lee |
| 1991 | ICCAD | A Switch-Level Matrix Approach to Transistor-Level Fault Simulation. | Terry Lee, Ibrahim N. Hajj |
| 1990 | ICCAD | An Algebra for Switch-Level Simulation. | Ibrahim N. Hajj |
| 1990 | ICCD | High speed VLSI logic simulation using bitwise operations and parallel processing. | Young-Hyun Jun, Ibrahim N. Hajj, Sang-Heon Lee, Song-Bai Park |
| 1989 | ICCAD | A custom cell generation system for double-metal CMOS technology. | P. Gee, Ibrahim N. Hajj, Sung-Mo Kang |
| 1989 | ICCAD | Computation of bus current variance for reliability estimation of VLSI circuits. | Farid N. Najm, Ibrahim N. Hajj, Ping Yang |
| 1989 | ICCAD | Automatic mixed-mode timing simulation. | David Overhauser, Ibrahim N. Hajj, Yi-Fan Hsu |
| 1989 | ICCD | Electromigration median time-to-failure based on a stochastic current waveform. | Farid N. Najm, Ibrahim N. Hajj, Ping Yang |
| 1989 | ICCD | Parallel-concurrent fault simulation. | Daniel G. Saab, Ibrahim N. Hajj, Joseph T. Rahmeh |
| 1988 | DAC | Delay Modeling and Time of Bipolar Digital Circuits. | Daniel G. Saab, Andrew T. Yang, Ibrahim N. Hajj |
| 1988 | ICCAD | iPRIDE: a parallel integrated circuit simulator using direct method. | Mi-Chang Chang, Ibrahim N. Hajj |
| 1988 | ICCAD | CREST-a current estimator for CMOS circuits. | Farid N. Najm, Richard Burch, Ping Yang, Ibrahim N. Hajj |
| 1988 | ICCAD | A tabular macromodeling approach to fast timing simulation including parasitics. | David Overhauser, Ibrahim N. Hajj |
| 1988 | ICCAD | iEDISON: an interactive statistical design tool for MOS VLSI circuits. | Tat-Kwan Yu, Sung-Mo Kang, Ibrahim N. Hajj, Timothy N. Trick |