| 2025 | ICML | FedECADO: A Dynamical System Model of Federated Learning. | Aayushya Agarwal, Gauri Joshi, Lawrence T. Pileggi |
| 2024 | DAC | An IP-Agnostic Foundational Cell Array Offering Supply Chain Security. | Christopher Talbot, Deepali Garg, Lawrence T. Pileggi, Kenneth Mai |
| 2024 | VLSID | Quantifying the Efficacy of Logic Locking Methods. | Joseph Sweeney, Deepali Garg, Lawrence T. Pileggi |
| 2023 | SP | Shedding Light on Inconsistencies in Grid Cybersecurity: Disconnects and Recommendations. | Brian Singer, Amritanshu Pandey, Shimiao Li, Lujo Bauer, Craig Miller, Lawrence T. Pileggi, Vyas Sekar |
| 2020 | ICCAD | Modeling Techniques for Logic Locking. | Joseph Sweeney, Marijn J. H. Heule, Lawrence T. Pileggi |
| 2020 | LPAR | Sensitivity Analysis of Locked Circuits. | Joseph Sweeney, Marijn Heule, Lawrence T. Pileggi |
| 2016 | IJCNN | On the design of phase locked loop oscillatory neural networks: Mitigation of transmission delay effects. | Rongye Shi, Thomas C. Jackson, Brian Swenson, Soummya Kar, Lawrence T. Pileggi |
| 2015 | ASPDAC | Accurate passivity-enforced macromodeling for RF circuits via iterative zero/pole update based on measurement data. | Ying-Chih Wang, Shihui Yin, Minhee Jun, Xin Li, Lawrence T. Pileggi, Tamal Mukherjee, Rohit Negi |
| 2014 | ASPDAC | Toward efficient programming of reconfigurable radio frequency (RF) receivers. | Jun Tao, Ying-Chih Wang, Minhee Jun, Xin Li, Rohit Negi, Tamal Mukherjee, Lawrence T. Pileggi |
| 2012 | DAC | Statistical design and optimization for adaptive post-silicon tuning of MEMS filters. | Fa Wang, Gokce Keskin, Andrew Phelps, Jonathan Rotner, Xin Li, Gary K. Fedder, Tamal Mukherjee, Lawrence T. Pileggi |
| 2010 | ISLPED | Reducing variability in chip-multiprocessors with adaptive body biasing. | Alyssa Bonnoit, Lawrence T. Pileggi |
| 2009 | DAC | Creating an affordable 22nm node using design-lithography co-optimization. | Andrzej J. Strojwas, Tejas Jhaveri, Vyacheslav Rovner, Lawrence T. Pileggi |
| 2009 | DAC | SRAM parametric failure analysis. | Jian Wang, Soner Yaldiz, Xin Li, Lawrence T. Pileggi |
| 2009 | ISLPED | Integrating dynamic voltage/frequency scaling and adaptive body biasing using test-time voltage selection. | Alyssa Bonnoit, Sebastian Herbert, Diana Marculescu, Lawrence T. Pileggi |
| 2007 | DAC | Efficient Parametric Yield Extraction for Multiple Correlated Non-Normal Performance Distributions of Analog/RF Circuits. | Xin Li, Lawrence T. Pileggi |
| 2007 | DAC | Parameterized Macromodeling for Analog System-Level Design Exploration. | Jian Wang, Xin Li, Lawrence T. Pileggi |
| 2007 | ICCAD | Adaptive post-silicon tuning for analog circuits: concept, analysis and optimization. | Xin Li, Brian Taylor, YuTsun Chien, Lawrence T. Pileggi |
| 2006 | DAC | Architecture-aware FPGA placement using metric embedding. | Padmini Gopalakrishnan, Xin Li, Lawrence T. Pileggi |
| 2006 | DAC | Projection-based statistical analysis of full-chip leakage power with non-log-normal distributions. | Xin Li, Jiayong Le, Lawrence T. Pileggi |
| 2006 | ICCD | Design Methodology of Regular Logic Bricks for Robust Integrated Circuits. | Kim Yaw Tong, Lawrence T. Pileggi |
| 2005 | DAC | Design methodology for IC manufacturability based on regular logic-bricks. | V. Kheterpal, Vyacheslav Rovner, T. G. Hersan, D. Motiani, Y. Takegawa, Andrzej J. Strojwas, Lawrence T. Pileggi |
| 2005 | DAC | OPERA: optimization with ellipsoidal uncertainty for robust analog IC design. | Yang Xu, Kan-Lin Hsiung, Xin Li, Ivan Nausieda, Stephen P. Boyd, Lawrence T. Pileggi |
| 2005 | DAC | Correlation-aware statistical timing analysis with non-gaussian delay distributions. | Yaping Zhan, Andrzej J. Strojwas, Xin Li, Lawrence T. Pileggi, David Newmark, Mahesh Sharma |
| 2005 | DATE | Modeling Interconnect Variability Using Efficient Parametric Model Order Reduction. | Peng Li, Frank Liu, Xin Li, Lawrence T. Pileggi, Sani R. Nassif |
| 2005 | ICCAD | Defining statistical sensitivity for timing optimization of logic circuits with large-scale process and environmental variations. | Xin Li, Jiayong Le, Mustafa Celik, Lawrence T. Pileggi |
| 2005 | ICCAD | Parameterized interconnect order reduction with explicit-and-implicit multi-parameter moment matching for inter/intra-die variations. | Xin Li, Peng Li, Lawrence T. Pileggi |
| 2005 | ICCAD | Projection-based performance modeling for inter/intra-die variations. | Xin Li, Jiayong Le, Lawrence T. Pileggi, Andrzej J. Strojwas |
| 2005 | ICCAD | Performance-centering optimization for system-level analog design exploration. | Xin Li, Jian Wang, Lawrence T. Pileggi, Tun-Shih Chen, Wanju Chiang |
| 2005 | ICCD | Temperature-Dependent Optimization of Cache Leakage Power Dissipation. | Peng Li, Yangdong Deng, Lawrence T. Pileggi |
| 2004 | DAC | CHIME: coupled hierarchical inductance model evaluation. | Satrajit Gupta, Lawrence T. Pileggi |
| 2004 | DAC | Routing architecture exploration for regular fabrics. | V. Kheterpal, Andrzej J. Strojwas, Lawrence T. Pileggi |
| 2004 | DAC | STAC: statistical timing analysis with correlation. | Jiayong Le, Xin Li, Lawrence T. Pileggi |
| 2004 | DAC | A frequency relaxation approach for analog/RF system-level simulation. | Xin Li, Yang Xu, Peng Li, Padmini Gopalakrishnan, Lawrence T. Pileggi |
| 2004 | DAC | ORACLE: optimization with recourse of analog circuits including layout extraction. | Yang Xu, Lawrence T. Pileggi, Stephen P. Boyd |
| 2004 | DATE | An Interconnect Channel Design Methodology for High Performance Integrated Circuits. | Vikas Chandra, Anthony Xu, Herman Schmit, Lawrence T. Pileggi |
| 2004 | DATE | Exploring Logic Block Granularity for Regular Fabrics. | Aneesh Koorapaty, V. Kheterpal, Padmini Gopalakrishnan, M. Fu, Lawrence T. Pileggi |
| 2004 | ICCAD | A power aware system level interconnect design methodology for latency-insensitive systems. | Vikas Chandra, Herman Schmit, Anthony Xu, Lawrence T. Pileggi |
| 2004 | ICCAD | Robust analog/RF circuit design with projection-based posynomial modeling. | Xin Li, Padmini Gopalakrishnan, Yang Xu, Lawrence T. Pileggi |
| 2004 | ICCAD | Asymptotic probability extraction for non-normal distributions of circuit performance. | Xin Li, Jiayong Le, Padmini Gopalakrishnan, Lawrence T. Pileggi |
| 2004 | ICCAD | Efficient harmonic balance simulation using multi-level frequency decomposition. | Peng Li, Lawrence T. Pileggi |
| 2004 | ICCAD | Efficient full-chip thermal modeling and analysis. | Peng Li, Lawrence T. Pileggi, Mehdi Asheghi, Rajit Chandra |
| 2003 | ASPDAC | A frequency separation macromodel for system-level simulation of RF circuits. | Xin Li, Peng Li, Yang Xu, Robert Dimaggio, Lawrence T. Pileggi |
| 2003 | ASPDAC | Nonlinear distortion analysis via linear-centric models. | Peng Li, Lawrence T. Pileggi |
| 2003 | DAC | Fast, cheap and under control: the next implementation fabric. | Abbas El Gamal, Ivo Bolsens, Andy Broom, Christopher Hamlin, Philippe Magarshack, Zvi Or-Bach, Lawrence T. Pileggi |
| 2003 | DAC | Analog and RF circuit macromodels for system-level analysis. | Xin Li, Peng Li, Yang Xu, Lawrence T. Pileggi |
| 2003 | DAC | NORM: compact model order reduction of weakly nonlinear systems. | Peng Li, Lawrence T. Pileggi |
| 2003 | DAC | Exploring regular fabrics to optimize the performance-cost trade-off. | Lawrence T. Pileggi, Herman Schmit, Andrzej J. Strojwas, Padmini Gopalakrishnan, V. Kheterpal, Aneesh Koorapaty, Chetan Patel, Vyacheslav Rovner, Kim Yaw Tong |
| 2003 | DATE | Heterogeneous Programmable Logic Block Architectures. | Aneesh Koorapaty, Vikas Chandra, Kim Yaw Tong, Chetan Patel, Lawrence T. Pileggi, Herman Schmit |
| 2003 | DATE | Noise Macromodel for Radio Frequency Integrated Circuits. | Yang Xu, Xin Li, Peng Li, Lawrence T. Pileggi |
| 2003 | FPL | Heterogeneous Logic Block Architectures for Via-Patterned Programmable Fabrics. | Aneesh Koorapaty, Lawrence T. Pileggi, Herman Schmit |
| 2003 | ICCAD | Circuit Simulation of Nanotechnology Devices with Non-monotonic I-V Characteristics. | Jiayong Le, Lawrence T. Pileggi, Anirudh Devgan |
| 2003 | ICCAD | A Hybrid Approach to Nonlinear Macromodel Generation for Time-Varying Analog Circuits. | Peng Li, Xin Li, Yang Xu, Lawrence T. Pileggi |
| 2002 | DAC | On the efficacy of simplified 2D on-chip inductance models. | Tao Lin, Michael W. Beattie, Lawrence T. Pileggi |
| 2002 | DAC | Modeling and analysis of regular symmetrically structured power/ground distribution networks. | Hui Zheng, Lawrence T. Pileggi |
| 2002 | DATE | A Linear-Centric Simulation Framework for Parametric Fluctuations. | Emrah Acar, Sani R. Nassif, Lawrence T. Pileggi |
| 2002 | DATE | On-Chip Inductance Models: 3D or Not 3D? | Tao Lin, Michael W. Beattie, Lawrence T. Pileggi |
| 2002 | DATE | A Linear-Centric Modeling Approach to Harmonic Balance Analysis. | Peng Li, Lawrence T. Pileggi |
| 2002 | DATE | Congestion-Aware Logic Synthesis. | Davide Pandini, Lawrence T. Pileggi, Andrzej J. Strojwas |
| 2002 | DATE | Window-Based Susceptance Models for Large-Scale RLC Circuit Analyses. | Hui Zheng, Lawrence T. Pileggi, Michael W. Beattie, Byron Krauter |
| 2002 | FPL | Modular, Fabric-Specific Synthesis for Programmable Architectures. | Aneesh Koorapaty, Lawrence T. Pileggi |
| 2002 | ICCAD | Throughput-driven IC communication fabric synthesis. | Tao Lin, Lawrence T. Pileggi |
| 2002 | ICCAD | Robust and passive model order reduction for circuits containing susceptance elements. | Hui Zheng, Lawrence T. Pileggi |
| 2001 | DAC | False Coupling Interactions in Static Timing Analysis. | Ravishankar Arunachalam, Ronald D. Blanton, Lawrence T. Pileggi |
| 2001 | DAC | Inductance 101: Modeling and Extraction. | Michael W. Beattie, Lawrence T. Pileggi |
| 2001 | DAC | Modeling Magnetic Coupling for On-Chip Interconnect. | Michael W. Beattie, Lawrence T. Pileggi |
| 2001 | DAC | Min/max On-Chip Inductance Models and Delay Metrics. | Yi-Chang Lu, Mustafa Celik, Tak Young, Lawrence T. Pileggi |
| 2001 | DATE | Efficient inductance extraction via windowing. | Michael W. Beattie, Lawrence T. Pileggi |
| 2000 | DAC | TACO: timing analysis with coupling. | Ravishankar Arunachalam, Karthik Rajagopal, Lawrence T. Pileggi |
| 2000 | DAC | Design closure (panel session): hope or hype? | Raul Camposano, Jacob Greidinger, Patrick Groeneveld, Michael Jackson, Lawrence T. Pileggi, Louis Scheffer |
| 2000 | DAC | Impact of interconnect variations on the clock skew of a gigahertz microprocessor. | Ying Liu, Sani R. Nassif, Lawrence T. Pileggi, Andrzej J. Strojwas |
| 2000 | ICCAD | Hierarchical Interconnect Circuit Models. | Michael W. Beattie, Satrajit Gupta, Lawrence T. Pileggi |
| 1999 | DAC | IC Analyses Including Extracted Inductance Models. | Michael W. Beattie, Lawrence T. Pileggi |
| 1999 | DAC | Model Order-Reduction of RC(L) Interconnect Including Variational Analysis. | Ying Liu, Lawrence T. Pileggi, Andrzej J. Strojwas |
| 1999 | ICCAD | Electromagnetic parasitic extraction via a multipole method with hierarchical refinement. | Michael W. Beattie, Lawrence T. Pileggi |
| 1999 | ICCAD | Practical considerations for passive reduction of RLC circuits. | Altan Odabasioglu, Mustafa Celik, Lawrence T. Pileggi |
| 1998 | DAC | TETA: Transistor-Level Engine for Timing Analysis. | Florentin Dartu, Lawrence T. Pileggi |
| 1998 | DAC | PRIMO: Probability Interpretation of Moments for Delay Calculation. | Rony Kay, Lawrence T. Pileggi |
| 1998 | DAC | Untitled record | Ying Liu, Lawrence T. Pileggi, Andrzej J. Strojwas |
| 1998 | ICCAD | Determination of worst-case aggressor alignment for delay calculation. | Paul D. Gross, Ravishankar Arunachalam, Karthik Rajagopal, Lawrence T. Pileggi |
| 1998 | ICCAD | h-gamma: an RC delay metric based on a gamma distribution approximation of the homogeneous response. | Tao Lin, Emrah Acar, Lawrence T. Pileggi |
| 1997 | DAC | Bounds for BEM Capacitance Extraction. | Michael W. Beattie, Lawrence T. Pileggi |
| 1997 | DAC | Calculating Worst-Case Gate Delays Due to Dominant Capacitance Coupling. | Florentin Dartu, Lawrence T. Pileggi |
| 1997 | DAC | SPIE: Sparse Partial Inductance Extraction. | Zhijiang He, Mustafa Celik, Lawrence T. Pileggi |
| 1997 | ICCAD | A hierarchical decomposition methodology for multistage clock circuits. | Gary Ellis, Lawrence T. Pileggi, Rob A. Rutenbar |
| 1997 | ICCAD | PRIMA: passive reduced-order interconnect macromodeling algorithm. | Altan Odabasioglu, Mustafa Celik, Lawrence T. Pileggi |
| 1997 | ICCD | CMOS Gate Delay Models for General RLC Loading. | Ravishankar Arunachalam, Florentin Dartu, Lawrence T. Pileggi |
| 1997 | ICCD | Clustering and Load Balancing for Buffered Clock Tree Synthesis. | Ashih D. Mehta, Yao-Ping Chen, Noel Menezes, D. F. Wong, Lawrence T. Pileggi |
| 1996 | DAC | RC-Interconnect Macromodels for Timing Simulation. | Florentin Dartu, Bogdan Tutuianu, Lawrence T. Pileggi |
| 1996 | DAC | A Sparse Image Method for BEM Capacitance Extraction. | Byron Krauter, Yu Xia, E. Aykut Dengi, Lawrence T. Pileggi |
| 1996 | DAC | An Explicit RC-Circuit Delay Approximation Based on the First Three Moments of the Impulse Response. | Bogdan Tutuianu, Florentin Dartu, Lawrence T. Pileggi |
| 1996 | VLSID | On Moment-Based Metric for Optimal Termination of Transmission Line Interconnects. | Rohini Gupta, Byron Krauter, Lawrence T. Pileggi |
| 1995 | DAC | The Elmore Delay as a Bound for RC Trees with Generalized Input Signals. | Rohini Gupta, Byron Krauter, Bogdan Tutuianu, John Willis, Lawrence T. Pileggi |
| 1995 | DAC | Transmission Line Synthesis. | Byron Krauter, Rohini Gupta, John Willis, Lawrence T. Pileggi |
| 1995 | DAC | Simultaneous Gate and Interconnect Sizing for Circuit-Level Delay Optimization. | Noel Menezes, Satyamurthy Pullela, Lawrence T. Pileggi |
| 1995 | ICCAD | Constrained multivariable optimization of transmission lines with general topologies. | Rohini Gupta, Lawrence T. Pileggi |
| 1995 | ICCAD | Generating sparse partial inductance matrices with guaranteed stability. | Byron Krauter, Lawrence T. Pileggi |
| 1995 | ICCAD | A sequential quadratic programming approach to concurrent gate and wire sizing. | Noel Menezes, Ross Baldick, Lawrence T. Pileggi |
| 1995 | ICCAD | Coping with RC(L) interconnect design headaches. | Lawrence T. Pileggi |