Marcelino B. Santos
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
43
Venues
10
Active years
1992–2025
Best venue rank
C
Where they publish
Papers
43 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2025 | ISCAS | An Ultra Low Power Circuits M.Sc. Course Proposal for the GreenChips-EDU Platform. | Jorge R. Fernandes, Ricardo Martins, Gonalo Rodrigues, Marcelino B. Santos |
| 2025 | ISCAS | A 0.5V Programmable Voltage Reference with Integrated Differential-Pair Trimming achieving 28.1ppm/°C Temperature Coefficient. | Diogo Ralo, Valter Sdio, Fbio Passos, Tiago H. Moita, Marcelino B. Santos |
| 2024 | FIE | WIP: Building an Education Ecosystem for Next Generation Microelectronics Experts in Green and Circular Economy with Digitally-Supported Teaching Methods for Sustainable Chips and Applications (EU Project GreenChips-EDU). | Klaus Hofmann, Ferdinand Keil, David Riehl, Alicja Michalowska-Forsyth, Nikolaus Czepl, Sarah Woywod, Dominik Zupan, Mario R. Casu, Carlo Ricciardi, Massimo Violante, Mariagrazia Graziano, Yuri Ardesi, Fabrizio Mo, Dominik Berger, Sabine Sill, Volker Visotschnig, Panagiota Morfouli, Liliana Prejbeanu, Katell Morin-Allory, Cyrille Chavet, Davide Bucci, Skandar Basrour, Jean-Christophe Crebier, Nhu-Huan Nguyen, Ernesto Quisbert-Trujillo, Christian Deflix, Isabelle Corbett-Etchevers, Johannes Sturm, Jens Peter Konrath, Ulla Birnbacher, Thomas Klinger, Wolfgang Werth, Jorge Fernandes, Marcelino B. Santos, Antonio Rubio, Alba Pags-Zamora, Josep Pegueroles, Jordi Salazar, Beatriz Otero, J. Manuel Moreno, X. Aragones, Israel Martin, Aleix Sole, Dunja Suttnig, Julia Calabro, Floriberto Lima, Eric Jouseau, Franois Cerisier, Cristian Rivier, Sepp Eisenriegler, Harald Reichl, Miroslav Macan, Dubravko Kruselj, Mladen Puskaric, Mirjana Tatalovic, Vinko Zelenicic, Bernd Deutschmann |
| 2022 | HCI | DRAM Performance Sensor. | Jorge Semio, Lus Santos, Marcelino B. Santos |
| 2018 | HCI | Performance Sensor for Reliable Operation. | Jorge Semio, Ruben Cabral, Marcelino B. Santos, Isabel C. Teixeira, Joo Paulo Teixeira |
| 2013 | FPL | Aging monitoring with local sensors in FPGA-based designs. | Carlos Leong, Jorge Semio, Isabel C. Teixeira, Marcelino B. Santos, Joo Paulo Teixeira, Mara Dolores Valds, Judit Freijedo, Juan J. Rodrguez-Andina, Fabian Vargas |
| 2011 | IOLTS | ICT: Interface software for the characterization and test of mixed-signal power cores. | Jorge O. M. Esteves, Tiago H. Moita, Carlos B. Almeida, Marcelino B. Santos |
| 2011 | VTS | Adaptive Error-Prediction Flip-flop for performance failure prediction with aging sensors. | Celestino V. Martins, Jorge Semio, Julio Csar Vzquez, Vctor H. Champac, Marcelino B. Santos, Isabel C. Teixeira, Joo Paulo Teixeira |
| 2010 | DATE | Programmable aging sensor for automotive safety-critical applications. | Julio Csar Vzquez, Vctor H. Champac, Isabel C. Teixeira, Marcelino B. Santos, Joo Paulo Teixeira |
| 2010 | IOLTS | Predictive error detection by on-line aging monitoring. | Julio Csar Vzquez, Vctor H. Champac, Adriel Ziesemer, Ricardo Reis, Jorge Semio, Isabel C. Teixeira, Marcelino B. Santos, Joo Paulo Teixeira |
| 2010 | VTS | Low-sensitivity to process variations aging sensor for automotive safety-critical applications. | Julio Csar Vzquez, Vctor H. Champac, Adriel Ziesemer, Ricardo Reis, Isabel Maria Cacho Teixeira, Marcelino B. Santos, Joo Paulo Teixeira |
| 2009 | IOLTS | Controllability and observability in mixed signal cores. | Jos F. da Rocha, Nuno Dias, Angelo Monteiro, Alexandre Neves, Gabriel Santos, Marcelino B. Santos, Joo Paulo Teixeira |
| 2009 | IOLTS | Delay-fault tolerance to power supply Voltage disturbances analysis in nanometer technologies. | Jorge Semio, Judit Freijedo, Juan J. Rodrguez-Andina, Fabian Vargas, Marcelino B. Santos, Isabel C. Teixeira, Joo Paulo Teixeira |
| 2009 | IOLTS | Built-in aging monitoring for safety-critical applications. | Julio Csar Vzquez, Vctor H. Champac, Adriel Ziesemer, Ricardo Reis, Isabel C. Teixeira, Marcelino B. Santos, Joo Paulo Teixeira |
| 2008 | DDECS | Process Tolerant Design Using Thermal and Power-Supply Tolerance in Pipeline Based Circuits. | Jorge Semio, Juan J. Rodrguez-Andina, Fabian Vargas, Marcelino B. Santos, Isabel C. Teixeira, Joo Paulo Teixeira |
| 2008 | IOLTS | Exploiting Parametric Power Supply and/or Temperature Variations to Improve Fault Tolerance in Digital Circuits. | Jorge Semio, Judit Freijedo, Juan J. Rodrguez-Andina, Fabian Vargas, Marcelino B. Santos, Isabel C. Teixeira, Joo Paulo Teixeira |
| 2007 | DDECS | Improving Tolerance to Power-Supply and Temperature Variations in Synchronous Circuits. | Jorge Semio, Judit Freijedo, Juan J. Rodrguez-Andina, Fabian Vargas, Marcelino B. Santos, Isabel C. Teixeira, Joo Paulo Teixeira |
| 2007 | IOLTS | On-line Dynamic Delay Insertion to Improve Signal Integrity in Synchronous Circuits. | Jorge Semio, Judit Freijedo, Juan J. Rodrguez-Andina, Fabian Vargas, Marcelino B. Santos, Isabel C. Teixeira, Joo Paulo Teixeira |
| 2006 | DDECS | Probabilistic Testability Analysis and DFT Methods at RTL. | Jos M. Fernandes, Marcelino B. Santos, Arlindo L. Oliveira, Joo Paulo Teixeira |
| 2006 | DDECS | Functional-Oriented BIST of Sequential Circuits Aiming at Dynamic Faults Coverage. | F. Guerreiro, Jorge Semio, A. Pierce, Marcelino B. Santos, Isabel C. Teixeira, Joo Paulo Teixeira |
| 2005 | IOLTS | Dynamic Fault Test and Diagnosis in Digital Systems Using Multiple Clock Schemes and Multi-VDD Test. | Marcial Jess Rodrguez-Irago, Juan J. Rodrguez-Andina, Fabian Vargas, Marcelino B. Santos, Isabel C. Teixeira, Joo Paulo Teixeira |
| 2004 | DATE | A Probabilistic Method for the Computation of Testability of RTL Constructs. | Jos M. Fernandes, Marcelino B. Santos, Arlindo L. Oliveira, Joo Paulo Teixeira |
| 2004 | FPL | FPGAs BIST Evaluation. | Abilio Parreira, Joo Paulo Teixeira, Marcelino B. Santos |
| 2004 | IOLTS | Modeling and Simulation of Time Domain Faults in Digital Systems. | Daniel Barros Jr., Fabian Vargas, Marcelino B. Santos, Isabel C. Teixeira, Joo Paulo Teixeira |
| 2003 | DATE | RTL Test Pattern Generation for High Quality Loosely Deterministic BIST. | Marcelino B. Santos, Jos M. Fernandes, Isabel C. Teixeira, Joo Paulo Teixeira |
| 2003 | FPL | Fault Simulation Using Partially Reconfigurable Hardware. | Abilio Parreira, Joo Paulo Teixeira, A. Pantelimon, Marcelino B. Santos, Jos T. de Sousa |
| 2003 | IOLTS | Property Coverage for Quality Assessment of Fault Tolerant or Fail Safe Systems. | Fernando M. Gonalves, Marcelino B. Santos, Isabel C. Teixeira, Joo Paulo Teixeira |
| 2002 | ITC | RTL Level Preparation of High-Quality/Low-Energy/Low-Power BIST. | Marcelino B. Santos, Isabel C. Teixeira, Joo Paulo Teixeira, Salvador Manich, Rosa Rodrguez-Montas, Joan Figueras |
| 2001 | ETS | RTL design validation, DFT and test pattern generation for high defects coverage. | Marcelino B. Santos, Fernando M. Gonalves, Isabel C. Teixeira, Joo Paulo Teixeira |
| 2001 | IOLTS | Design and Test of Certifiable ASICs for Safety-Critical Gas Burners Contro. | Fernando M. Gonalves, Marcelino B. Santos, Isabel C. Teixeira, Joo Paulo Teixeira |
| 2001 | ITC | Implicit functionality and multiple branch coverage (IFMB): a testability metric for RT-level. | Fernando M. Gonalves, Marcelino B. Santos, Isabel C. Teixeira, Joo Paulo Teixeira |
| 2000 | ETS | RTL-based functional test generation for high defects coverage in digital SOCs. | Marcelino B. Santos, Fernando M. Gonalves, Isabel C. Teixeira, Joo Paulo Teixeira |
| 1999 | DATE | Defect-Oriented Mixed-Level Fault Simulation of Digital Systems-on-a-Chip Using HDL. | Marcelino B. Santos, Joo Paulo Teixeira |
| 1999 | ETS | From system level to defect-oriented test: a case study. | Octvio Pscoa Dias, Jorge Semio, Marcelino B. Santos, Isabel Maria Cacho Teixeira, Joo Paulo Teixeira |
| 1999 | ETS | Low power BIST by filtering non-detecting vectors. | Salvador Manich, A. Gabarr, M. Lopez, Joan Figueras, Patrick Girard, Los Guiller, Christian Landrault, Serge Pravossoudovitch, Joo Paulo Teixeira, Marcelino B. Santos |
| 1999 | ISCAS | Low-energy BIST design: impact of the LFSR TPG parameters on the weighted switching activity. | Patrick Girard, Los Guiller, Christian Landrault, Serge Pravossoudovitch, Joan Figueras, Salvador Manich, Joo Paulo Teixeira, Marcelino B. Santos |
| 1999 | VTS | Defect-Oriented Verilog Fault Simulation of SoC Macros using a Stratified Fault Sampling Technique. | Marcelino B. Santos, Fernando M. Gonalves, Isabel C. Teixeira, Joo Paulo Teixeira |
| 1998 | ITC | Defect-oriented test quality assessment using fault sampling and simulation. | Fernando M. Gonalves, Marcelino B. Santos, Isabel C. Teixeira, Joo Paulo Teixeira |
| 1996 | ITC | Defect-Oriented IC Test and Diagnosis Using VHDL Fault Simulation. | F. Celeiro, L. Dias, J. Ferreira, Marcelino B. Santos, Joo Paulo Teixeira |
| 1995 | DATE | Test preparation methodology for high coverage of physical defects in CMOS digital ICs. | Marcelino B. Santos, M. Simes, Isabel C. Teixeira, Joo Paulo Teixeira |
| 1995 | VTS | Test preparation for high coverage of physical defects in CMOS digital ICs. | Marcelino B. Santos, M. Simes, Isabel C. Teixeira, Joo Paulo Teixeira |
| 1994 | ITC | Back Annotation of Physical Defects into Gate-Level, Realistic Faults in Digital ICs. | Mario Calha, Marcelino B. Santos, Fernando M. Gonalves, Isabel C. Teixeira, Joo Paulo Teixeira |
| 1992 | ITC | Physical DFT for High Coverage of Realistic Faults. | M. Saraiva, P. Casimiro, Marcelino B. Santos, Jos T. de Sousa, Fernando M. Gonalves, Isabel C. Teixeira, Joo Paulo Teixeira |