| 2007 | SC | The Neumann Syndrome calls for a revolution. | Reiner W. Hartenstein |
| 2006 | FPL | From Equation to VHDL: Using Rewriting Logic for Automated Function Generation. | Carlos Morra, M. Sackmann, Sunil Shukla, Jrgen Becker, Reiner W. Hartenstein |
| 2006 | ISLPED | Flexibility and low power: a contradiction in terms? | Peter Wintermayr, Reiner W. Hartenstein, Heinrich Meyr, Steve Leibson |
| 2005 | FPL | FELIX: Using Rewriting-Logic for Generating Functionally Equivalent Implementations. | Carlos Morra, Jrgen Becker, Mauricio Ayala-Rincn, Reiner W. Hartenstein |
| 2004 | WCAE | The changing role of computer architecture education within CS curricula: invited presentation. | Reiner W. Hartenstein |
| 2003 | FDL | Using Rewriting-Logic Notation for Funcional Verification in Data-Stream Based Reconfigurable Computing. | Mauricio Ayala-Rincn, Ricardo P. Jacobi, Carlos H. Llanos, Reiner W. Hartenstein |
| 2002 | FPL | Disruptive Trends by Data-Stream-Based Computing. | Reiner W. Hartenstein |
| 2001 | ASPDAC | Coarse grain reconfigurable architecture (embedded tutorial). | Reiner W. Hartenstein |
| 2001 | DATE | A decade of reconfigurable computing: a visionary retrospective. | Reiner W. Hartenstein |
| 2001 | DSD | Reconfigurable Computing: A New Business Model and its Impact on SoC Design. | Reiner W. Hartenstein |
| 2000 | ASPDAC | KressArray Xplorer: a new CAD environment to optimize reconfigurable datapath array. | Reiner W. Hartenstein, Michael Herz, Thomas Hoffmann, Ulrich Nageldinger |
| 2000 | FPGA | Synthesis and domain-specific optimization of KressArray-based reconfigurable computing engines (poster abstract). | Reiner W. Hartenstein, Michael Herz, Thomas Hoffmann, Ulrich Nageldinger |
| 2000 | FPL | Generation of Design Suggestions for Coarse-Grain Reconfigurable Architectures. | Reiner W. Hartenstein, Michael Herz, Thomas Hoffmann, Ulrich Nageldinger |
| 1999 | FPL | Mapping Applications onto Reconfigurable Kress Arrays. | Reiner W. Hartenstein, Michael Herz, Thomas Hoffmann, Ulrich Nageldinger |
| 1999 | FPL | An Internet Based Development Framework for Reconfigurable Computing. | Reiner W. Hartenstein, Michael Herz, Ulrich Nageldinger, Thomas Hoffmann |
| 1998 | ASPDAC | Parallelization in Co-Compilation for Configurable Accelerators. | Jrgen Becker, Reiner W. Hartenstein, Michael Herz, Ulrich Nageldinger |
| 1998 | FPL | Designing for Xilinx XC6200 FPGAs. | Reiner W. Hartenstein, Michael Herz, Frank Gilbert |
| 1998 | FPL | Exploiting Contemporary Memory Techniques in Reconfigurable Accelerators. | Reiner W. Hartenstein, Michael Herz, Thomas Hoffmann, Ulrich Nageldinger |
| 1998 | RSP | Real-Time Prototyping in Microprocessor/Accelerator Symbiosis. | Jrgen Becker, Reiner W. Hartenstein |
| 1997 | FPL | Data scheduling to increase performance of parallel accelerators. | Reiner W. Hartenstein, Jrgen Becker, Michael Herz, Ulrich Nageldinger |
| 1997 | FPL | An operating system for custom computing machines based on the Xputer paradigm. | Rainer Kress, Reiner W. Hartenstein, Ulrich Nageldinger |
| 1997 | VLSID | Hardware/Software Co-Design for Data-Driven Xputer-based Accelerators. | Reiner W. Hartenstein, Jrgen Becker |
| 1996 | ECRTS | An Embedded Accelerator for Real-Time Image Processing. | Reiner W. Hartenstein, Jrgen Becker, Rainer Kress |
| 1996 | FPL | Custom Computing Machines vs. Hardware/Software Codesign: From a globalized point of view. | Reiner W. Hartenstein, Jrgen Becker, Rainer Kress |
| 1996 | VLSID | CoDe-C: A Novel Two-Level Hardware/Software Co-Design Framework. | Reiner W. Hartenstein, Jrgen Becker, Rainer Kress, Helmut Reinig |
| 1995 | ASPDAC | A datapath synthesis system for the reconfigurable datapath architecture. | Reiner W. Hartenstein, Rainer Kress |
| 1995 | SAC | Combining structural and procedural programming by parallelizing compilation. | Reiner W. Hartenstein, Karin Schmidt |
| 1994 | FPL | Data-Procedural Languages for FPL-based Machines. | Andreas Ast, Jrgen Becker, Reiner W. Hartenstein, Rainer Kress, Helmut Reinig, Karin Schmidt |
| 1994 | FPL | A New FPGA Architecture for Word-Oriented Datapaths. | Reiner W. Hartenstein, Rainer Kress, Helmut Reinig |
| 1992 | FPGA | Novel High Performance Machine Paradigms and Fast- Turnaround ASIC Design Methods. | Andreas Ast, Reiner W. Hartenstein, Rainer Kress, Helmut Reinig, Karin Schmidt |
| 1990 | ICPP | The Machine Paradigm of Xputers and its Application to Digital Signal Processing Acceleration. | Reiner W. Hartenstein, Alexander G. Hirschbiel, Michael Weber |
| 1990 | VCIP | Xputer use in image processing and digital signal processing. | Reiner W. Hartenstein, Alexander G. Hirschbiel, Karin Lemmert, Michael Riedmller, Karin Schmidt, Michael Weber |
| 1988 | GI | MLED - Ein Mehrebenen Graphik Editor fr den VLSI-Entwurf. | Reiner W. Hartenstein, K. W. Jrg, Udo Welters |
| 1988 | GI | Partitionierungsschemata fr Rechnerstrukturen. | Reiner W. Hartenstein, Michael Ryba |
| 1988 | ICCD | The KARL/KARATE system - integrating functional test development into a CAD environment for VLSI. | Gerold Alfs, Reiner W. Hartenstein, Andrea Wodtko |
| 1988 | ITC | The KARL/KARATE System: Automatic Test Pattern Generation Based on RT Level Descriptions. | Gerold Affs, Reiner W. Hartenstein, Andrea Wodtko |
| 1982 | GI | Die "Neue Mikroelektronik" in der Informatik: Voraussetzungen und Auswirkungen. | Reiner W. Hartenstein |
| 1980 | GI | Ein Compiler fr die Register Transfer-Sprache KARL-2. | Reiner W. Hartenstein, Peter Liell |
| 1974 | MICRO | Microprogramming concepts - a step towards structured hardware design. | Reiner W. Hartenstein |
| 1973 | GI | Hierarchy of Interpreters for Modelling Complex Digital Systems. | Reiner W. Hartenstein |
| 1973 | ISCA | Increasing Hardware Complexity - A Challenge to Computer Architecture Education. | Reiner W. Hartenstein |
| 1973 | MICRO | A microprogrammable display processor concept. | Reiner W. Hartenstein, Klaus D. Mueller |
| 1972 | GI | Experimentiersystem fr ein technisches Informatikpraktikum. | Reiner W. Hartenstein |