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Subhasish Mitra

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

142

Venues

18

Active years

1997–2025

Best venue rank

A*

Where they publish

Papers

142 indexed papers, newest first.

YearVenueTitleAuthors
2025ITCIC-PEPR: PEPR Testing Goes Intra-Cell.Chris Nigh, Ruben Purdy, Wei Li, Subhasish Mitra, R. D. (Shawn) Blanton
2024ETSSilent Data Corruption: Test or Reliability Problem?Erik Jan Marinissen, Harish Dattatraya Dixit, Ronald Shawn Blanton, Aaron Kuo, Wei Li, Subhasish Mitra, Chris Nigh, Ruben Purdy, Ben Kaczer, Dishant Sangani, Pieter Weckx, Philippe J. Roussel, Georges G. E. Gielen
2024ETSFaulty Function Extraction for Defective Circuits.Chris Nigh, Ruben Purdy, Wei Li, Subhasish Mitra, R. D. Shawn Blanton
2024ICCADEfficient Ultra-Dense 3D IC Power Delivery and Cooling Using 3D Thermal Scaffolding.Dennis Rich, Tathagata Srimani, Mohamadali Malakoutian, Srabanti Chowdhury, Subhasish Mitra
2023DACG-QED: Generalized QED Pre-silicon Verification beyond Non-Interfering Hardware Accelerators.Saranyu Chattopadhyay, Keerthikumara Devarajegowda, Bihan Zhao, Florian Lonsing, Brandon A. D'Agostino, Ioanna Vavelidou, Vijay Deep Bhatt, Sebastian Prebeck, Wolfgang Ecker, Caroline Trippel, Clark W. Barrett, Subhasish Mitra
2023DACThermal Scaffolding for Ultra-Dense 3D Integrated Circuits.Dennis Rich, Anna Kasperovich, Mohamadali Malakoutian, Robert M. Radway, Shiho Hagiwara, Takahide Yoshikawa, Srabanti Chowdhury, Subhasish Mitra
2023DATEUltra-Dense 3D Physical Design Unlocks New Architectural Design Points with Large Benefits.Tathagata Srimani, Robert M. Radway, Jinwoo Kim, Kartik Prabhu, Dennis Rich, Carlo Gilardi, Priyanka Raina, Max M. Shulaker, Sung Kyu Lim, Subhasish Mitra
2023ICCADPBA: Percentile-Based Level Allocation for Multiple-Bits-Per-Cell RRAM.Anjiang Wei, Akash Levy, Pu Yi, Robert M. Radway, Priyanka Raina, Subhasish Mitra, Sara Achour
2022ITCPEPR: Pseudo-Exhaustive Physically-Aware Region Testing.Wei Li, Chris Nigh, Danielle Duvalsaint, Subhasish Mitra, Ronald D. Blanton
2021FMCADScaling Up Hardware Accelerator Verification using A-QED with Functional Decomposition.Saranyu Chattopadhyay, Florian Lonsing, Luca Piccolboni, Deepraj Soni, Peng Wei, Xiaofan Zhang, Yuan Zhou, Luca P. Carloni, Deming Chen, Jason Cong, Ramesh Karri, Zhiru Zhang, Caroline Trippel, Clark W. Barrett, Subhasish Mitra
2020DACDECOY: DEflection-Driven HLS-Based Computation Partitioning for Obfuscating Intellectual PropertY.Jianqi Chen, Monir Zaman, Yiorgos Makris, R. D. Shawn Blanton, Subhasish Mitra, Benjamin Carrin Schfer
2020DACA Formal Approach for Detecting Vulnerabilities to Transient Execution Attacks in Out-of-Order Processors.Mohammad Rahmani Fadiheh, Johannes Mller, Raik Brinkmann, Subhasish Mitra, Dominik Stoffel, Wolfgang Kunz
2020DACA-QED Verification of Hardware Accelerators.Eshan Singh, Florian Lonsing, Saranyu Chattopadhyay, Maxwell Strange, Peng Wei, Xiaofan Zhang, Yuan Zhou, Deming Chen, Jason Cong, Priyanka Raina, Zhiru Zhang, Clark W. Barrett, Subhasish Mitra
2020DATEGap-free Processor Verification by SKeerthikumara Devarajegowda, Mohammad Rahmani Fadiheh, Eshan Singh, Clark W. Barrett, Subhasish Mitra, Wolfgang Ecker, Dominik Stoffel, Wolfgang Kunz
2020FMCADA Theoretical Framework for Symbolic Quick Error Detection.Florian Lonsing, Subhasish Mitra, Clark W. Barrett
2020ISCASSensory Particles with Optical Telemetry.Karthik Ganesan, Thomas A. Flores, Binh Q. Le, Dante G. Muratore, Neal A. Patel, Subhasish Mitra, Boris Murmann, Daniel Palanker
2020ISLPEDReconfigurable tiles of computing-in-memory SRAM architecture for scalable vectorization.Roman Gauchi, Valentin Egloff, Maha Kooli, Jean-Philippe Nol, Bastien Giraud, Pascal Vivet, Subhasish Mitra, Henri-Pierre Charles
2020VLSIDMessage from the Technical Program Co-Chairs.David Atienza, Subhasish Mitra, Manan Suri
2019DACCross-Layer Resilience: Challenges, Insights, and the Road Ahead.Eric Cheng, Daniel Mueller-Gritschneder, Jacob A. Abraham, Pradip Bose, Alper Buyuktosunoglu, Deming Chen, Hyungmin Cho, Yanjing Li, Uzair Sharif, Kevin Skadron, Mircea Stan, Ulf Schlichtmann, Subhasish Mitra
2019DATEProcessor Hardware Security Vulnerabilities and their Detection by Unique Program Execution Checking.Mohammad Rahmani Fadiheh, Dominik Stoffel, Clark W. Barrett, Subhasish Mitra, Wolfgang Kunz
2019DATEReview of Methodologies for Pre- and Post-Silicon Analog Verification in Mixed-Signal SOCs.Georges G. E. Gielen, Nektar Xama, Karthik Ganesan, Subhasish Mitra
2019DATESymbolic QED Pre-silicon Verification for Automotive Microcontroller Cores: Industrial Case Study.Eshan Singh, Keerthikumara Devarajegowda, Sebastian Simon, Ralf Schnieder, Karthik Ganesan, Mohammad Rahmani Fadiheh, Dominik Stoffel, Wolfgang Kunz, Clark W. Barrett, Wolfgang Ecker, Subhasish Mitra
2019ICCADUnlocking the Power of Formal Hardware Verification with CoSA and Symbolic QED: Invited Paper.Florian Lonsing, Karthik Ganesan, Makai Mann, Srinivasa Shashank Nuthakki, Eshan Singh, Mario Srouji, Yahan Yang, Subhasish Mitra, Clark W. Barrett
2019ISCASA Data-Compressive Wired-OR Readout for Massively Parallel Neural Recording.Dante G. Muratore, Pulkit Tandon, Mary Wootters, E. J. Chichilnisky, Subhasish Mitra, Boris Murmann
2018DACTRIG: hardware accelerator for inference-based applications and experimental demonstration using carbon nanotube FETs.Gage Hills, Daniel Bankman, Bert Moons, Lita Yang, Jake Hillard, Alex Kahng, Rebecca Park, Marian Verhelst, Boris Murmann, Max M. Shulaker, H.-S. Philip Wong, Subhasish Mitra
2018DATESymbolic quick error detection using symbolic initial state for pre-silicon verification.Mohammad Rahmani Fadiheh, Joakim Urdahl, Srinivasa Shashank Nuthakki, Subhasish Mitra, Clark W. Barrett, Dominik Stoffel, Wolfgang Kunz
2018DATEETISS-ML: A multi-level instruction set simulator with RTL-level fault injection support for the evaluation of cross-layer resiliency techniques.Daniel Mueller-Gritschneder, Martin Dittrich, Josef Weinzierl, Eric Cheng, Subhasish Mitra, Ulf Schlichtmann
2018ISCASComing Up N3XT, After 2D Scaling of Si CMOS.William Hwang, Weier Wan, Subhasish Mitra, H.-S. Philip Wong
2017ASPDACASP-DAC 2017 keynote speech I: In memory of Edward J. McCluskey: The next wave of pioneering innovations.Subhasish Mitra, Deming Chen
2017CAVE-QED: Electrical Bug Localization During Post-silicon Validation Enabled by Quick Error Detection and Formal Methods.Eshan Singh, Clark W. Barrett, Subhasish Mitra
2017DACA Systems Approach to Computing in Beyond CMOS Fabrics: Invited.Ameya Patil, Naresh R. Shanbhag, Lav R. Varshney, Eric Pop, H.-S. Philip Wong, Subhasish Mitra, Jan M. Rabaey, Jeffrey A. Weldon, Larry T. Pileggi, Sasikanth Manipatruni, Dmitri E. Nikonov, Ian A. Young
2017ICCDVery Low Voltage (VLV) Design.Ramon Bertran, Pradip Bose, David M. Brooks, Jeff Burns, Alper Buyuktosunoglu, Nandhini Chandramoorthy, Eric Cheng, Martin Cochet, Schuyler Eldridge, Daniel J. Friedman, Hans M. Jacobson, Rajiv V. Joshi, Subhasish Mitra, Robert K. Montoye, Arun Paidimarri, Pritish Parida, Kevin Skadron, Mircea Stan, Karthik Swaminathan, Augusto Vega, Swagath Venkataramani, Christos Vezyrtzis, Gu-Yeon Wei, John-David Wellman, Matthew M. Ziegler
2017ICCDCross-Layer Resilience in Low-Voltage Digital Systems: Key Insights.Eric Cheng, Jacob A. Abraham, Pradip Bose, Alper Buyuktosunoglu, Keith A. Campbell, Deming Chen, Chen-Yong Cher, Hyungmin Cho, Binh Q. Le, Klas Lilja, Shahrzad Mirkhani, Kevin Skadron, Mircea Stan, Lukasz G. Szafaryn, Christos Vezyrtzis, Subhasish Mitra
2016DACClear: cross-layer exploration for architecting resilience combining hardware and software techniques to tolerate soft errors in processor cores.Eric Cheng, Shahrzad Mirkhani, Lukasz G. Szafaryn, Chen-Yong Cher, Hyungmin Cho, Kevin Skadron, Mircea R. Stan, Klas Lilja, Jacob A. Abraham, Pradip Bose, Subhasish Mitra
2016ETSCross-layer resilience.Subhasish Mitra
2015ASPDACMultiple Independent Gate FETs: How many gates do we need?Luca Gaetano Amar, Gage Hills, Pierre-Emmanuel Gaillardon, Subhasish Mitra, Giovanni De Micheli
2015DACHybrid quick error detection (H-QED): accelerator validation and debug using high-level synthesis principles.Keith A. Campbell, David Lin, Subhasish Mitra, Deming Chen
2015DACUnderstanding soft errors in uncore components.Hyungmin Cho, Chen-Yong Cher, Thomas Shepherd, Subhasish Mitra
2015DATEQuick error detection tests with fast runtimes for effective post-silicon validation and debug.David Lin, Eswaran S, Sharad Kumar, Eric Rentschler, Subhasish Mitra
2015DATEEfficient soft error vulnerability estimation of complex designs.Shahrzad Mirkhani, Subhasish Mitra, Chen-Yong Cher, Jacob A. Abraham
2015DATEMonolithic 3D integration: a path from concept to reality.Max M. Shulaker, Tony F. Wu, Mohamed M. Sabry, Hai Wei, H.-S. Philip Wong, Subhasish Mitra
2015ISCASTime-based sensor interface circuits in carbon nanotube technology.Georges G. E. Gielen, Jelle Van Rethy, Max M. Shulaker, Gage Hills, H.-S. Philip Wong, Subhasish Mitra
2015ITCA structured approach to post-silicon validation and debug using symbolic quick error detection.David Lin, Eshan Singh, Clark W. Barrett, Subhasish Mitra
2014ASPDACQED post-silicon validation and debug: Frequently asked questions.David Lin, Subhasish Mitra
2014ASPDACRethinking error injection for effective resilience.Shahrzad Mirkhani, Hyungmin Cho, Subhasish Mitra, Jacob A. Abraham
2014DATECross layer resiliency in real world.Vikas Chandra, Subhasish Mitra, Chen-Yong Cher, Silvia Melitta Mller
2014ITCWelcome message.Michael Purtell, Subhasish Mitra
2013DACQuantitative evaluation of soft error injection techniques for robust system design.Hyungmin Cho, Shahrzad Mirkhani, Chen-Yong Cher, Jacob A. Abraham, Subhasish Mitra
2013DACRapid exploration of processing and design guidelines to overcome carbon nanotube variations.Gage Hills, Jie Zhang, Charles Mackin, Max M. Shulaker, Hai Wei, H.-S. Philip Wong, Subhasish Mitra
2013DACSacha: the Stanford carbon nanotube controlled handshaking robot.Max M. Shulaker, Jelle Van Rethy, Gage Hills, Hong-Yu Chen, Georges G. E. Gielen, H.-S. Philip Wong, Subhasish Mitra
2013DATEOvercoming post-silicon validation challenges through quick error detection (QED).David Lin, Ted Hong, Yanjing Li, Farzan Fallah, Donald S. Gardner, Nagib Hakim, Subhasish Mitra
2013DATECarbon nanotube circuits: opportunities and challenges.Hai Wei, Max M. Shulaker, Gage Hills, Hong-Yu Chen, Chi-Shuen Lee, Luckshitha Liyanage, Jie Zhang, H.-S. Philip Wong, Subhasish Mitra
2013ISLPEDCarbon nanotube imperfection-immune digital VLSI.Subhasish Mitra
2013ITCSelf-repair of uncore components in robust system-on-chips: An OpenSPARC T2 case study.Yanjing Li, Eric Cheng, Samy Makar, Subhasish Mitra
2013ITCEarly-life-failure detection using SAT-based ATPG.Matthias Sauer, Young Moon Kim, Jun Seomun, Hyung-Ock Kim, Kyung Tae Do, Jung Yun Choi, Kee Sup Kim, Subhasish Mitra, Bernd Becker
2012ASPDACNano-Electro-Mechanical (NEM) relays and their application to FPGA routing.Chen Chen, W. Scott Lee, J. Provine, Soogine Chong, Roozbeh Parsa, Daesung Lee, Roger T. Howe, H.-S. Philip Wong, Subhasish Mitra
2012ASPDACBug localization techniques for effective post-silicon validation.Subhasish Mitra, David Lin, Nagib Hakim, Donald S. Gardner
2012DACQuick detection of difficult bugs for effective post-silicon validation.David Lin, Ted Hong, Farzan Fallah, Nagib Hakim, Subhasish Mitra
2012DATENano-Electro-Mechanical relays for FPGA routing: Experimental demonstration and a design technique.Chen Chen, W. Scott Lee, Roozbeh Parsa, Soogine Chong, J. Provine, Jeff Watt, Roger T. Howe, H.-S. Philip Wong, Subhasish Mitra
2012VLSIDTutorial T6: Variability-resistant Software and Hardware for Nano-Scale Computing.Nikil D. Dutt, Mani B. Srivastava, Rajesh Gupta, Subhasish Mitra
2011ICCADCarbon nanotube imperfection-immune digital VLSI: Frequently asked questions updated.Hai Wei, Jie Zhang, Lan Wei, Nishant Patil, Albert Lin, Max M. Shulaker, Hong-Yu Chen, H.-S. Philip Wong, Subhasish Mitra
2010DACPost-silicon validation opportunities, challenges and recent advances.Subhasish Mitra, Sanjit A. Seshia, Nicola Nicolici
2010DACBLoG: post-silicon bug localization in processors using bug localization graphs.Sung-Boem Park, Anne Bracy, Hong Wang, Subhasish Mitra
2010DACCarbon nanotube correlation: promising opportunity for CNFET circuit yield enhancement.Jie Zhang, Shashikanth Bobba, Nishant Patil, Albert Lin, H.-S. Philip Wong, Giovanni De Micheli, Subhasish Mitra
2010DATEStatistical static timing analysis using Markov chain Monte Carlo.Yashodhan Kanoria, Subhasish Mitra, Andrea Montanari
2010DATEERSA: Error Resilient System Architecture for probabilistic applications.Larkhoon Leem, Hyungmin Cho, Jason Bau, Quinn Jacobson, Subhasish Mitra
2010DATEOptimized self-tuning for circuit aging.Evelyn Mintarno, Jolle Skaf, Rui Zheng, Jyothi Velamala, Yu Cao, Stephen P. Boyd, Robert W. Dutton, Subhasish Mitra
2010DATECross-layer resilience challenges: Metrics and optimization.Subhasish Mitra, Kevin Brelsford, Pia N. Sanda
2010DATECarbon nanotube circuits: Living with imperfections and variations.Jie Zhang, Nishant Patil, Albert Lin, H.-S. Philip Wong, Subhasish Mitra
2010FPGAEfficient FPGAs using nanoelectromechanical relays.Chen Chen, Roozbeh Parsa, Nishant Patil, Soogine Chong, Kerem Akarvardar, J. Provine, David Lewis, Jeff Watt, Roger T. Howe, H.-S. Philip Wong, Subhasish Mitra
2010ICCADCross-layer error resilience for robust systems.Larkhoon Leem, Hyungmin Cho, Hsiao-Heng Lee, Young Moon Kim, Yanjing Li, Subhasish Mitra
2010ITCQED: Quick Error Detection tests for effective post-silicon validation.Ted Hong, Yanjing Li, Sung-Boem Park, Diana Mui, David Lin, Ziyad Abdel Kaleq, Nagib Hakim, Helia Naeimi, Donald S. Gardner, Subhasish Mitra
2010VLSIDRobust System Design.Subhasish Mitra
2010VTSGate-oxide early-life failure identification using delay shifts.Young Moon Kim, Tze Wee Chen, Yoshio Kameda, Masayuki Mizuno, Subhasish Mitra
2010VTSConcurrent autonomous self-test for uncore components in system-on-chips.Yanjing Li, Onur Mutlu, Donald S. Gardner, Subhasish Mitra
2009DACDigital VLSI logic technology using Carbon Nanotube FETs: frequently asked questions.Nishant Patil, Albert Lin, Jie Zhang, H.-S. Philip Wong, Subhasish Mitra
2009DACCarbon nanotube circuits in the presence of carbon nanotube density variations.Jie Zhang, Nishant Patil, Arash Hazeghi, Subhasish Mitra
2009DATEImperfection-immune VLSI logic circuits using Carbon Nanotube Field Effect Transistors.Subhasish Mitra, Jie Zhang, Nishant Patil, Hai Wei
2009ICCADNanoelectromechanical (NEM) relays integrated with CMOS SRAM for improved stability and low leakage.Soogine Chong, Kerem Akarvardar, Roozbeh Parsa, Jun-Bo Yoon, Roger T. Howe, Subhasish Mitra, H.-S. Philip Wong
2009ICCADOperating system scheduling for efficient online self-test in robust systems.Yanjing Li, Onur Mutlu, Subhasish Mitra
2009ICCDImperfection-immune Carbon Nanotube digital VLSI.Nishant Patil, Subhasish Mitra
2009VTSTesting for Transistor Aging.A. Hakan Baba, Subhasish Mitra
2008DACIFRA: instruction footprint recording and analysis for post-silicon bug localization in processors.Sung-Boem Park, Subhasish Mitra
2008DATESoft Errors: System Effects, Protection Techniques and Case Studies.Dimitris Gizopoulos, Kaushik Roy, Subhasish Mitra, Pia N. Sanda
2008DATECASP: Concurrent Autonomous Chip Self-Test Using Stored Test Patterns.Yanjing Li, Samy Makar, Subhasish Mitra
2008DATEGlobally Optimized Robust Systems to Overcome Scaled CMOS Reliability Challenges.Subhasish Mitra
2008DATEDependable Embedded Systems Special Day Panel: Issues and Challenges in Dependable Embedded Systems.Neeraj Suri, Christof Fetzer, Jacob A. Abraham, Stefan Poledna, Avi Mendelson, Subhasish Mitra
2008DATEDesign Guidelines for Metallic-Carbon-Nanotube-Tolerant Digital Logic Circuits.Jie Zhang, Nishant Patil, Subhasish Mitra
2008ICCADA low-overhead fault tolerance scheme for TSV-based 3D network on chip links.Igor Loi, Subhasish Mitra, Thomas H. Lee, Shinobu Fujita, Luca Benini
2008ICCADReliable system design: models, metrics and design techniques.Subhasish Mitra, Ravishankar K. Iyer, Kishor S. Trivedi, James W. Tschanz
2008IOLTSSoft Error Protection Techniques.Subhasish Mitra
2008ITCOptimized Circuit Failure Prediction for Aging: Practicality and Promise.Mridul Agarwal, Varsha Balakrishnan, Anshuman Bhuyan, Kyunglok Kim, Bipul C. Paul, Wenping Wang, Bo Yang, Yu Cao, Subhasish Mitra
2008ITCVAST: Virtualization-Assisted Concurrent Autonomous Self-Test.Hiroaki Inoue, Yanjing Li, Subhasish Mitra
2008VTSGate-Oxide Early Life Failure Prediction.Tze Wee Chen, Kyunglok Kim, Young Moon Kim, Subhasish Mitra
2007DACAutomated Design of Misaligned-Carbon-Nanotube-Immune Circuits.Nishant Patil, Jie Deng, H.-S. Philip Wong, Subhasish Mitra
2007DATEVerification-guided soft error resilience.Sanjit A. Seshia, Wenchao Li, Subhasish Mitra
2007IOLTSCircuit Failure Prediction Enables Robust System Design Resilient to Aging and Wearout.Subhasish Mitra
2007IOLTSSoft Errors: Technology Trends, System Effects, and Protection Techniques.Subhasish Mitra, Pia N. Sanda, Norbert Seifert
2007ITCCalifornia scan architecture for high quality and low power testing.Kyoung Youn Cho, Subhasish Mitra, Edward J. McCluskey
2007ITCCircuit failure prediction to overcome scaled CMOS reliability challenges.Subhasish Mitra, Mridul Agarwal
2007VTSCircuit Failure Prediction and Its Application to Transistor Aging.Mridul Agarwal, Bipul C. Paul, Ming Zhang, Subhasish Mitra
2006IOLTSShould Logic SER be Solved at the Circuit Level?T. M. Mak, Subhasish Mitra
2006ITCCombinational Logic Soft Error Correction.Subhasish Mitra, Ming Zhang, Saad Waqas, Norbert Seifert, Balkaran S. Gill, Kee Sup Kim
2006ITCSignature Analyzer Design for Yield Learning Support.Nishant Patil, Subhasish Mitra, Steven S. Lumetta
2006ITCTest Compression for FPGAs.Mehdi Baradaran Tahoori, Subhasish Mitra
2006VTSEvaluation of Test Metrics: Stuck-at, Bridge Coverage Estimate and Gate Exhaustive.Ruifeng Guo, Subhasish Mitra, M. Enamul Amyeen, Jinkyu Lee, Srihari Sivaraj, Srikanth Venkataraman
2006SRDSHow To Safeguard Your Sensitive Data.Bob Mungamuru, Hector Garcia-Molina, Subhasish Mitra
2005DACLogic soft errors in sub-65nm technologies design and CAD challenges.Subhasish Mitra, Tanay Karnik, Norbert Seifert, Ming Zhang
2005DACResponse compaction with any number of unknowns using a new LFSR architecture.Erik H. Volkerink, Subhasish Mitra
2005IOLTSDFT Assisted Built-In Soft Error Resilience.T. M. Mak, Subhasish Mitra, Ming Zhang
2005ITCGate exhaustive testing.Kyoung Youn Cho, Subhasish Mitra, Edward J. McCluskey
2005ITCLogic soft errors: a major barrier to robust platform design.Subhasish Mitra, Ming Zhang, T. M. Mak, Norbert Seifert, Victor Zia, Kee Sup Kim
2005ITCEnabling yield analysis with X-compact.Zoran Stanojevic, Ruifeng Guo, Subhasish Mitra, Srikanth Venkataraman
2005VLSIDTesting Nanometer Digital Integration Circuits: Myths, Reality and the Road Ahead.R. D. (Shawn) Blanton, Subhasish Mitra
2004FCCMDefect and Fault Tolerance of Reconfigurable Molecular Computing.Mehdi Baradaran Tahoori, Subhasish Mitra
2004ITCSpeed Clustering of Integrated Circuits.Kenneth A. Brand, Erik H. Volkerink, Edward J. McCluskey, Subhasish Mitra
2004ITCX-Tolerant Signature Analysis.Subhasish Mitra, Steven S. Lumetta, Michael Mitzenmacher
2004ITCInterconnect Delay Testing of Designs on Programmable Logic Devices.Mehdi Baradaran Tahoori, Subhasish Mitra
2004VTSELF-Murphy Data on Defects and Test Sets.Edward J. McCluskey, Ahmad A. Al-Yamani, Chien-Mo James Li, Chao-Wen Tseng, Erik H. Volkerink, Franois-Fabien Ferhani, Edward Li, Subhasish Mitra
2004VTSDelay Defect Screening using Process Monitor Structures.Subhasish Mitra, Erik H. Volkerink, Edward J. McCluskey, Stefan Eichenberger
2003ICCDXMAX: X-Tolerant Architecture for MAXimal Test Compression.Subhasish Mitra, Kee Sup Kim
2003ITCH-DFT: A Hybrid DFT Architecture For Low-Cost High Quality Structural Testing.David M. Wu, Mike Lin, Subhasish Mitra, Kee Sup Kim, Anil Sabbavarapu, Talal Jaber, Pete Johnson, Dale March, Greg Parrish
2003VTSBist Reseeding with very few Seeds.Ahmad A. Al-Yamani, Subhasish Mitra, Edward J. McCluskey
2003VTSAutomatic Configuration Generation for FPGA Interconnect Testing.Mehdi Baradaran Tahoori, Subhasish Mitra
2003VTSEfficient Seed Utilization for Reseeding based Compression.Erik H. Volkerink, Subhasish Mitra
2002ITCX-Compact: An Efficient Response Compaction Technique for Test Cost Reduction.Subhasish Mitra, Kee Sup Kim
2002ITCFault Grading FPGA Interconnect Test Configurations.Mehdi Baradaran Tahoori, Subhasish Mitra, Shahin Toutounchi, Edward J. McCluskey
2002ITCPacket-Based Input Test Data Compression Techniques.Erik H. Volkerink, Ajay Khoche, Subhasish Mitra
2002VTSTest Vector Compression Using EDA-ATE Synergies.Ajay Khoche, Erik H. Volkerink, Jochen Rivoir, Subhasish Mitra
2002VTSDebating the Future of Burn-In.Edward J. McCluskey, Subhasish Mitra, Bob Madge, Peter C. Maxwell, Phil Nigh, Mike Rodgers
2002VTSDesign for Testability and Testing of IEEE 1149.1 Tap Controller.Subhasish Mitra, Edward J. McCluskey, Samy Makar
2001DSNTechniques for Estimation of Design Diversity for Combinational Logic Circuits.Subhasish Mitra, Nirmal R. Saxena, Edward J. McCluskey
2001VTSDesign Diversity for Concurrent Error Detection in Sequential Logic Circuts.Subhasish Mitra, Edward J. McCluskey
2001VTSDesign of Redundant Systems Protected Against Common-Mode Failures.Subhasish Mitra, Edward J. McCluskey
2001VTSAn Evaluation of Pseudo Random Testing for Detecting Real Defects.Chao-Wen Tseng, Subhasish Mitra, Edward J. McCluskey, Scott Davidson
2000ITCCombinational logic synthesis for diversity in duplex systems.Subhasish Mitra, Edward J. McCluskey
2000ITCWhich concurrent error detection scheme to choose ?Subhasish Mitra, Edward J. McCluskey
2000VTSWord Voter: A New Voter Design for Triple Modular Redundant Systems.Subhasish Mitra, Edward J. McCluskey
2000VTSFault Escapes in Duplex Systems.Subhasish Mitra, Nirmal R. Saxena, Edward J. McCluskey
1999ITCA design diversity metric and reliability analysis for redundant systems.Subhasish Mitra, Nirmal R. Saxena, Edward J. McCluskey
1997ICCADAn output encoding problem and a solution technique.Subhasish Mitra, LaNae J. Avra, Edward J. McCluskey
1997ITCScan Synthesis for One-Hot Signals.Subhasish Mitra, LaNae J. Avra, Edward J. McCluskey