Design, Automation and Test in Europe Conference
DATE
A
CORE rank
CORE rank (raw)
A
Fields of research
Computer Systems Engineering · Software Engineering
Papers indexed
9,217
1995–2026
Papers per year
1995445 peak2026
Most published authors
DATE papers
9,217 records sourced from DBLP. Search titles, filter by year, sort by recency.
| Year | Title | Authors |
|---|---|---|
| 2018 | VerC3: A library for explicit state synthesis of concurrent systems. | Marco Elver, Christopher J. Banks, Paul B. Jackson, Vijay Nagarajan |
| 2018 | A fast and effective lookahead and fractional search based scheduling algorithm for high-level synthesis. | Shantanu Dutt, Ouwen Shi |
| 2018 | HME: A lightweight emulator for hybrid memory. | Zhuohui Duan, Haikun Liu, Xiaofei Liao, Hai Jin |
| 2018 | Gain scheduled control for nonlinear power management in CMPs. | Bryan Donyanavard, Amir M. Rahmani, Tiago Mck, Kasra Moazemmi, Nikil D. Dutt |
| 2018 | A circuit-design-driven tool with a hybrid automation approach for SAR ADCs in IoT. | Ming Ding, Guibin Chen, Pieter Harpe, Benjamin Busze, Yao-Hong Liu, Christian Bachmann, Kathleen Philips, Arthur H. M. van Roermund |
| 2018 | A co-design methodology for scalable quantum processors and their classical electronic interface. | Jeroen P. G. van Dijk, Andrei Vladimirescu, Masoud Babaie, Edoardo Charbon, Fabio Sebastiano |
| 2018 | Online analysis of debug trace data for embedded systems. | Normann Decker, Boris Dreyer, Philip Gottschling, Christian Hochberger, Alexander Lange, Martin Leucker, Torben Scheffel, Simon Wegener, Alexander Weiss |
| 2018 | SAT-based redundancy removal. | Krishanu Debnath, Rajeev Murgai, Mayank Jain, Janet Olson |
| 2018 | URECA: Unified register file for CGRAs. | Shail Dave, Mahesh Balasubramanian, Aviral Shrivastava |
| 2018 | Symbolic assertion mining for security validation. | Alessandro Danese, Valeria Bertacco, Graziano Pravadelli |
| 2018 | A Boolean model for delay fault testing of emerging digital technologies based on ambipolar devices. | Marcello Dalpasso, Davide Bertozzi, Michele Favalli |
| 2018 | ShadowGC: Cooperative garbage collection with multi-level buffer for performance improvement in NAND flash-based SSDs. | Jinhua Cui, Youtao Zhang, Jianhang Huang, Weiguo Wu, Jun Yang |
| 2018 | An automated configurable Trojan insertion framework for dynamic trust benchmarks. | Jonathan Cruz, Yuanwen Huang, Prabhat Mishra, Swarup Bhunia |
| 2018 | A soft-error resilient route computation unit for 3D Networks-on-Chips. | Alexandre Coelho, Amir Charif, Nacer-Eddine Zergainoh, Juan A. Fraire, Raoul Velazco |
| 2018 | End-to-end latency analysis of cause-effect chains in an engine management system. | Junchul Choi, Donghyun Kang, Soonhoi Ha |
| 2018 | An efficient NBTI-aware wake-up strategy for power-gated designs. | Kun-Wei Chiu, Yu-Guang Chen, Ing-Chao Lin |
| 2018 | Design and optimization of FeFET-based crossbars for binary convolution neural networks. | Xiaoming Chen, Xunzhao Yin, Michael T. Niemier, Xiaobo Sharon Hu |
| 2018 | Efficient wear leveling for inodes of file systems on persistent memories. | Xianzhang Chen, Edwin Hsing-Mean Sha, Yuansong Zeng, Chaoshu Yang, Weiwen Jiang, Qingfeng Zhuge |
| 2018 | Neural networks for safety-critical applications - Challenges, experiments and perspectives. | Chih-Hong Cheng, Frederik Diehl, Gereon Hinz, Yassine Hamza, Georg Nhrenberg, Markus Rickert, Harald Ruess, Michael Truong-Le |
| 2018 | moDNN: Memory optimal DNN training on GPUs. | Xiaoming Chen, Danny Z. Chen, Xiaobo Sharon Hu |
| 2018 | Exploiting approximate computing for deep learning acceleration. | Chia-Yu Chen, Jungwook Choi, Kailash Gopalakrishnan, Viji Srinivasan, Swagath Venkataramani |
| 2018 | Performance based tuning of an inductive integrated voltage regulator driving a digital core against process and passive variations. | Venakata Chaitanya Krishna Chekuri, Monodeep Kar, Arvind Singh, Saibal Mukhopadhyay |
| 2018 | Trustworthy proofs for sensor data using FPGA based physically unclonable functions. | Urbi Chatterjee, Durga Prasad Sahoo, Debdeep Mukhopadhyay, Rajat Subhra Chakraborty |
| 2018 | Cache-aware task scheduling for maximizing control performance. | Wanli Chang, Debayan Roy, Xiaobo Sharon Hu, Samarjit Chakraborty |
| 2018 | Optimizing power-accuracy trade-off in approximate adders. | D. Celia, Vinita Vasudevan, Nitin Chandrachoodan |
3,126–3,150 of 9,217← PreviousNext →
Comparable venues
Other A*/A conferences filed under the same field of research.
- A*DACDesign Automation Conf
- ASCInternational Conference for High Performance Computing, Networking, Storage and Analysis (was Supercomputing Conference)
- AICCADIEEE/ACM International Conference on Computer-Aided Design
- AITCIEEE International Test Conference
- A*ISCAACM International Symposium on Computer Architecture
- A*MICROInternational Symposium on Microarchitecture
- AISLPEDIEEE/ACM International Symposium on Low Power Electronics and Design
- AICSACM International Conference on Supercomputing