| 2015 | Accelerating complex brain-model simulations on GPU platforms. | Hoang Anh Du Nguyen, Zaid Al-Ars, Georgios Smaragdos, Christos Strydis |
| 2015 | Hardware trojan detection by delay and electromagnetic measurements. | Xuan Thuy Ngo, Ingrid Exurville, Shivam Bhasin, Jean-Luc Danger, Sylvain Guilley, Zakaria Najm, Jean-Baptiste Rigaud, Bruno Robisson |
| 2015 | A pulsed-index technique for single-channel, low-power, dynamic signaling. | Shahzad Muzaffar, Jerald Yoo, Ayman Shabra, Ibrahim Abe M. Elfadel |
| 2015 | Lightweight authentication for secure automotive networks. | Philipp Mundhenk, Sebastian Steinhorst, Martin Lukasiewycz, Suhaib A. Fahmy, Samarjit Chakraborty |
| 2015 | MPIOV: scaling hardware-based I/O virtualization for mixed-criticality embedded real-time systems using non transparent bridges to (multi-core) multi-processor systems. | Daniel Mnch, Michael Paulitsch, Oliver Hanka, Andreas Herkersdorf |
| 2015 | Impact of process-variations in STTRAM and adaptive boosting for robustness. | Seyedhamidreza Motaman, Swaroop Ghosh, Nitin Rathi |
| 2015 | Fault modeling in controllable polarity silicon nanowire circuits. | Hassan Ghasemzadeh Mohammadi, Pierre-Emmanuel Gaillardon, Giovanni De Micheli |
| 2015 | Efficient soft error vulnerability estimation of complex designs. | Shahrzad Mirkhani, Subhasish Mitra, Chen-Yong Cher, Jacob A. Abraham |
| 2015 | An energy-efficient virtual channel power-gating mechanism for on-chip networks. | Amirhossein Mirhosseini, Mohammad Sadrosadati, Ali Fakhrzadehgan, Mehdi Modarressi, Hamid Sarbazi-Azad |
| 2015 | A closed loop transmitting power self-calibration scheme for energy efficient WiNoC architectures. | Andrea Mineo, Mohd Shahrizal Rusli, Maurizio Palesi, Giuseppe Ascia, Vincenzo Catania, Muhammad N. Marsono |
| 2015 | A hybrid packet/circuit-switched router to accelerate memory access in NoC-based chip multiprocessors. | Abbas Mazloumi, Mehdi Modarressi |
| 2015 | A defect-aware reconfigurable cache architecture for low-vccmin DVFS-enabled systems. | Michail Mavropoulos, Georgios Keramidas, Dimitris Nikolos |
| 2015 | De-elastisation: from asynchronous dataflows to synchronous circuits. | Mahdi Jelodari Mamaghani, Jim D. Garside, Doug A. Edwards |
| 2015 | Ultra-low-power ECG front-end design based on compressed sensing. | Hossein Mamaghanian, Pierre Vandergheynst |
| 2015 | On-chip network-enabled many-core architectures for computational biology applications. | Turbo Majumder, Partha Pratim Pande, Ananth Kalyanaraman |
| 2015 | NoC-enabled multicore architectures for stochastic analysis of biomolecular reactions. | Turbo Majumder, Xian Li, Paul Bogdan, Partha Pratim Pande |
| 2015 | A packet-switched interconnect for many-core systems with BE and RT service. | Runan Ma, Zhida Hui, Axel Jantsch |
| 2015 | Verifying synchronous reactive systems using lazy abstraction. | Kumar Madhukar, Mandayam K. Srivas, Bjrn Wachter, Daniel Kroening, Ravindra Metta |
| 2015 | SAHARA: a security-aware hazard and risk analysis method. | Georg Macher, Harald Sporer, Reinhard Berlach, Eric Armengaud, Christian Kreiner |
| 2015 | Simultaneous transistor pairing and placement for CMOS standard cells. | Ang Lu, Hsueh-Ju Lu, En-Jang Jang, Yu-Po Lin, Chun-Hsiang Hung, Chun-Chih Chuang, Rung-Bin Lin |
| 2015 | Layout-aware sizing of analog ICs using floorplan & routing estimates for parasitic extraction. | Nuno Loureno, Ricardo Martins, Nuno Horta |
| 2015 | Architecture of ring-based redundant TSV for clustered faults. | Wei-Hen Lo, Kang Chi, TingTing Hwang |
| 2015 | Spintronic devices as key elements for energy-efficient neuroinspired architectures. | Nicolas Locatelli, Adrien F. Vincent, Alice Mizrahi, Joseph S. Friedman, Damir Vodenicarevic, Joo-Von Kim, Jacques-Olivier Klein, Weisheng Zhao, Julie Grollier, Damien Querlioz |
| 2015 | Leakage power reduction for deeply-scaled FinFET circuits operating in multiple voltage regimes using fine-grained gate-length biasing technique. | Ji Li, Qing Xie, Yanzhi Wang, Shahin Nazarian, Massoud Pedram |
| 2015 | An effective triple patterning aware grid-based detailed routing approach. | Zhiqing Liu, Chuangwen Liu, Evangeline F. Y. Young |