| 2006 | Minimization of Large State Spaces using Symbolic Branching Bisimulation. | Ralf Wimmer, Marc Herbstritt, Bernd Becker |
| 2006 | Productivity and Code Quality Improvement of Mixed-Signal Test Software by Applying Software Engineering Methods. | Stefan Vock, Ulrich Flogaus, Hans Martin von Staudt |
| 2006 | A Flexible SoPC-based Fault Injection Environment. | Pierre Vanhauwaert, Rgis Leveugle, Philippe Roche |
| 2006 | Design-for-Test of Asynchronous Networks-on-Chip. | Xuan-Tu Tran, Vincent Beroulle, Jean Durupt, Chantal Robach, Franois Bertrand |
| 2006 | Comprehensive Design of a High Frequency PLL Synthesizer for ZigBee Application. | Andrs Timr, bel Vmos, Gyrgy Bognr |
| 2006 | A Novel Design Evaluation Concept Applied to Switched-Current Algorithmic A/D Converters. | Ondrej Subrt, Pravoslav Martnek |
| 2006 | Power-Constrained, Sessionless SoC Test Scheduling Based on Exploration of I-Schedule State-Space. | Josef Strnadel |
| 2006 | ReCoM: A New Reconfigurable Compute Fabric Architecture for Computation-Intensive Applications. | Luca Sterpone, Massimo Violante |
| 2006 | HW Implementation of the Backtrace Algorithm with Conflict-Driven Dynamic Reconfiguration. | Martin Stva, Ondrej Novk |
| 2006 | LEON-2: General Purpose Processor for a Wireless Engine. | Zoran Stamenkovic, C. Wolf, Gnter Schoof, Jiri Gaisler |
| 2006 | Test Scheduling for SoC under Power Constraints. | Jaroslav Skarvada |
| 2006 | FPGA Implementation of a Fast MDCT Algorithm. | Martin Simlastk, Peter Malk, Toms Pikula, Marcel Balz |
| 2006 | How to Improve a Set of Design Validation Data by Using Mutation-based Test. | Youssef Serrestou, Vincent Beroulle, Chantal Robach |
| 2006 | Novel Logic Circuits Controlled by Vdd: Transistor-Level Simulations of Polymorphic Combinational Modules. | Luks Sekanina, Luks Starecek, Zdenek Kotsek |
| 2006 | CMOS Testing at the End of the Roadmap: Challenges and Opportunities. | Jaume Segura |
| 2006 | Recognition of DRM Signal in Frequency Domain and Hardware Demands. | Lukas Ruckay |
| 2006 | A Low Complexity, High Speed, Regular and Flexible Reed Solomon Decoder for Wireless Communication. | Abid Rashid, Frank H. P. Fitzek, Ole Olsen, Morten Gade, Yannick Le Moullec |
| 2006 | An Optimal Lower-Bound Algorithm for the High-Level Synthesis Scheduling Problem. | Geguang Pu, Jifeng He, Zongyan Qiu |
| 2006 | Sensor Powering with Integrated MOS Compatible Solar Cell Array. | Gergely Perlaky, Gbor Mezsi, Imre Zolomy |
| 2006 | Run-Time Debugging and Monitoring of FPGA Circuits Using Embedded Microprocessor. | Aki Penttinen, Rafal P. Jastrzebski, Riku Pllnen, Olli Pyrhnen |
| 2006 | FITTest_BENCH06: A New Set of Benchmark Circuits Reflecting Diagnostic Properties. | Tomas Pecenka, Zdenek Kotsek, Luks Sekanina |
| 2006 | Architecture Design for the Context Formatter in the H.264/AVC Encoder. | Grzegorz Pastuszak |
| 2006 | Multi-Site Collaboration in System on Chip Design and Validation: The Intel Experience. | Ketan Paranjape |
| 2006 | Collective Communication AAB for Regular and Irregular Topology Based on Prediction of Conflicts. | Milos Ohldal, Josef Schwarz |
| 2006 | Normal Basis Multipliers of General Digit Width Applicable in Elliptic Curve Cryptography. | Martin Novotn, Jan Schmidt |