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Alberto Bosio

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

123

Venues

12

Active years

2005–2026

Best venue rank

A*

Where they publish

Papers

123 indexed papers, newest first.

YearVenueTitleAuthors
2026DATEMulti-Partner Project: Scalable, Ferroelectric-based Accelerators for Energy Efficient Edge AI (Ferro4EdgeAI).Theofilos Spyrou, Yashvardhan Biyani, Konstantinos Stavrakakis, Rajendra Bishnoi, Said Hamdioui, Joel Minguet Lopez, Louise Dumas, Jean Coignus, Denys Ly, Hugo Chazot-Ranquet, Laurent Grenouillet, Fabien Grimaud, Simon Martin, Olivier Billoint, Franois Andrieu, Ruben Alcala, Stefan Slesazeck, Athira Sunil, Chong Peng, Antoine Cauquil, Rosario Pronsat, Damien Deleruyelle, Cdric Marchand, Alberto Bosio, Ian O'Connor, Giulio Urlini, Simon Jeannot, Mohammad Sajedi Alvar, Nima Akbari Moghaddam, Thilo Werner, Tony Schenk, Bojun Cheng, Mina Khoei, Luca Prez Ramrez, EunJin Koh, Somnath Kale, Nicholas Barrett
2026DDECSComparative Analysis of Hardware Accelerator Architectures for Performance and Energy Efficient Deep Neural Network Execution.Salsabil Saoudi, Mario Barbareschi, Alberto Bosio
2026ETSTest Sample Ranking for Fault Detection in Decision Tree-based Inference Model.Antonio Emmanuele, Mario Barbareschi, Alberto Bosio
2026ETSA Holistic Framework to Assess Reliability Issues in Emerging Technologies due to Ageing, Voltage and Temperature Variation.Sara Mannaa, Grgory Loubet, Salvatore Pappalardo, Cdric Marchand, Damien Deleruyelle, Alberto Bosio, Christoph Lenz, Oskar Baumgartner, Yifan Wang, Franois Marc, Chhandak Mukherjee, Marina Deng, Cristell Maneux, Ian O'Connor
2026IOLTSHybrid Hardening for Robust DNNs Under Adversarial Attacks.Leonardo Alexandrino De Melo, Manar Gani, Alberto Bosio, Ovidiu Stan, Vlad-Cristian Miclea, Liviu Miclea, Rodrigo Possamai Bastos, David Novo, Bastien Deveautour
2026VTSVTS2026 Contest Publication: TTTC's E.J. McCluskey Best Doctoral Thesis Award.Luca Benini, Paolo Bernardi, Alberto Bosio, Swarup Bhunia, Riccardo Cantoro, Degang Chen, Krishnendu Chakrabarty, Jayeeta Chaudhuri, Bastien Deveautour, Gabriele Filipponi, Angelo Garofalo, Salvatore Pappalardo, Sudipta Paria, Michael Rogenmoser, Philippe Sauter, Michael Sekyere, Chen Wu
2026VTSSpecial Session: Reliability Assessment of DNN Models and Inference on Systolic Arrays.Natalia Cherezova, Salvatore Pappalardo, Annachiara Ruospo, Bastien Deveautour, Lorenzo Fezza, Artur Jutman, Ernesto Snchez, Alberto Bosio, Matteo Sonza Reorda, Maksim Jenihhin
2025DDECSAutomatic generation of input-aware approximate arithmetic circuits.Mario Barbareschi, Salvatore Barone, Alberto Bosio, Bastien Deveautour, Ali Piri, Marcello Traiola
2025DDECSDEAR-CNN: Data-Efficient Assessment of Resiliency in Convolutional Neural Networks.Nicol Bellarmino, Alberto Bosio, Riccardo Cantoro, Annachiara Ruospo, Ernesto Snchez
2025ETSEuropean Test Symposium Teams: an Anniversary Snapshot.Maksim Jenihhin, Jaan Raik, Artur Jutman, Natalia Cherezova, Raimund Ubar, Liviu Miclea, Szilrd Enyedi, Iulia Stefan, Ovidiu Stan, Cosmina Corches, Zebo Peng, Petru Eles, Rolf Drechsler, S. Eggersgl, Grschwin Fey, Andreas Glowatz, Daniel Tille, Georges G. E. Gielen, Anthony Coyette, Wim Dobbelaere, Ronny Vanhooren, Po-Yao Chuang, Erik Jan Marinissen, Giorgio Di Natale, M. Barragan, Paolo Maistri, S. Mir, Vatajelu I. Vatajelu, Paolo Bernardi, Stefano Di Carlo, Paolo Prinetto, Matteo Sonza Reorda, Massimo Violante, Haralampos-G. Stratigopoulos, M. K. Michael, Stelios Neophytou, Stavros Hadjitheophanous, Kyriakos Christou, M. Skitsas, Alberto Bosio, Bastien Deveautour, Patrick Girard, Marcello Traiola, Arnaud Virazel, Fernando Fernandes dos Santos, Angeliki Kritikakou, Gioele Casagranda, Marzio Vallero, Flavio Vella, Paolo Rech, Letcia Maria Bolzani Poehls, Milos Krstic, Marko S. Andjelkovic, Fabian Luis Vargas, Grigor Tshagharyan, Gurgen Harutyunyan, Valery A. Vardanian, Samvel K. Shoukourian, Yervant Zorian, Jennifer Dworak, Kundan Nepal, Theodore W. Manikas, Mottaqiallah Taouil, Moritz Fieback, Anteneh Gebregiorgis, Rajendra Bishnoi, Said Hamdioui, Abhijit Chatterjee, Anurup Saha, Suhasini Komarraju, K. Ma, Chandramouli N. Amarnath, Mehdi Baradaran Tahoori, Mahta Mayahinia, Maryam Rajabalipanah, Katayoon Basharkhah, N. Nosrati, Zahra Jahanpeima, Zain Navabi, Hans-Joachim Wunderlich, Sybille Hellebrand
2025ITCA Benchmark Suite to Evaluate DNN's Resilience.Cristiana Bolchini, Alberto Bosio, Luca Cassano, Antonio Miele, Salvatore Pappalardo, Dario Passariello, Annachiara Ruospo, Ernesto Snchez, Matteo Sonza Reorda, Vittorio Turco
2025VTSSpecial Session: Trustworthy Hardware-AI at the Cloud.Francesco Angione, Paolo Bernardi, Alberto Bosio, Harish Dattatraya Dixit, Salvatore Pappalardo, Annachiara Ruospo, Ernesto Snchez, Arani Sinha, Vittorio Turco
2025VTSMicroFI: TensorFlow Lite based Fault Injection Framework for Microcontrollers.Leonardo Alexandrino De Melo, Rodrigo Possamai Bastos, Alberto Bosio
2024DATEResilience of Deep Learning Applications: Where We are and Where We Want to Go.Cristiana Bolchini, Alberto Bosio
2024DATEFVLLMONTI: The 3D Neural Network Compute Cube $(N^{2}C^{2})$ Concept for Efficient Transformer Architectures Towards Speech-to-Speech Translation.Ian O'Connor, Sara Mannaa, Alberto Bosio, Bastien Deveautour, Damien Deleruyelle, Tetiana Obukhova, Cdric Marchand, Jens Trommer, igdem akirlar, Bruno Neckel Wesling, Thomas Mikolajick, Oskar Baumgartner, Mischa Thesberg, David Pirker, Christoph Lenz, Zlatan Stanojevic, Markus Karner, Guilhem Larrieu, Sylvain Pelloquin, Konstantinous Moustakas, Jonas Mller, Giovanni Ansaloni, Alireza Amirshahi, David Atienza, Jean-Luc Rouas, Leila Ben Letaifa, Georgeta Bordeall, Charles Brazier, Chhandak Mukherjee, Marina Deng, Yifan Wang, Marc Franois, Houssem Rezgui, Reveil Lucas, Cristell Maneux
2024DATEHigh-Performance Data Mapping for BNNs on PCM-Based Integrated Photonics.Taha Shahroodi, Raphael Cardoso, Stephan Wong, Alberto Bosio, Ian O'Connor, Said Hamdioui
2024DDECSSAFFIRA: a Framework for Assessing the Reliability of Systolic-Array-Based DNN Accelerators.Mahdi Taheri, Masoud Daneshtalab, Jaan Raik, Maksim Jenihhin, Salvatore Pappalardo, Paul Jimnez, Bastien Deveautour, Alberto Bosio
2024ETSApproximate Fault-Tolerant Neural Network Systems.Marcello Traiola, Salvatore Pappalardo, Ali Piri, Annachiara Ruospo, Bastien Deveautour, Ernesto Snchez, Alberto Bosio, Sepide Saeedi, Alessio Carpegna, Anil Bayram Gogebakan, Enrico Magliano, Alessandro Savino
2024IOLTSHardware Accelerator for FIPS 202 Hash Functions in Post-Quantum Ready SoCs.Diamante Simone Crescenzo, Rafael Carrera Rodriguez, Riccardo Alidori, Florent Bruguier, Emanuele Valea, Pascal Benoit, Alberto Bosio
2024PRDCRobustness of Redundancy-Hardened Convolutional Neural Networks Against Adversarial Attacks.Leonardo Alexandrino De Melo, Mauricio Gomes de Queiroz, Alberto Bosio, Rodrigo Possamai Bastos
2024VTSSpecial Session: Reliability Assessment Recipes for DNN Accelerators.Mohammad Hasan Ahmadilivani, Alberto Bosio, Bastien Deveautour, Fernando Fernandes dos Santos, Juan-David Guerrero-Balaguera, Maksim Jenihhin, Angeliki Kritikakou, Robert Limas Sierra, Salvatore Pappalardo, Jaan Raik, Josie E. Rodriguez Condia, Matteo Sonza Reorda, Mahdi Taheri, Marcello Traiola
2023DATEExploiting assertions mining and fault analysis to guide RTL-level approximation.Alberto Bosio, Samuele Germiniani, Graziano Pravadelli, Marcello Traiola
2023DATELightspeed Binary Neural Networks using Optical Phase-Change Materials.Taha Shahroodi, Raphael Cardoso, Mahdi Zahedi, Stephan Wong, Alberto Bosio, Ian O'Connor, Said Hamdioui
2023DDECSResilience-Performance Tradeoff Analysis of a Deep Neural Network Accelerator.Salvatore Pappalardo, Annachiara Ruospo, Ian O'Connor, Bastien Deveautour, Ernesto Snchez, Alberto Bosio
2023DSNInput-aware accuracy characterization for approximate circuits.Ali Piri, Salvatore Pappalardo, Salvatore Barone, Mario Barbareschi, Bastien Deveautour, Marcello Traiola, Ian O'Connor, Alberto Bosio
2023VTSSpecial Session: Approximation and Fault Resiliency of DNN Accelerators.Mohammad Hasan Ahmadilivani, Mario Barbareschi, Salvatore Barone, Alberto Bosio, Masoud Daneshtalab, Salvatore Della Torca, Gabriele Gavarini, Maksim Jenihhin, Jaan Raik, Annachiara Ruospo, Ernesto Snchez, Mahdi Taheri
2023VTSSpecial Session: Neuromorphic hardware design and reliability from traditional CMOS to emerging technologies.Fabio Pavanello, Elena-Ioana Vatajelu, Alberto Bosio, Thomas Van Vaerenbergh, Peter Bienstman, Benot Charbonnier, Alessio Carpegna, Stefano Di Carlo, Alessandro Savino
2022ASPDACA Heuristic Exploration of Retraining-free Weight-Sharing for CNN Compression.Etienne Dupuis, David Novo, Ian O'Connor, Alberto Bosio
2022DDECSA Design Space Exploration Framework for Memristor-Based Crossbar Architecture.Mario Barbareschi, Alberto Bosio, Ian O'Connor, Petr Fiser, Marcello Traiola
2022DDECSDependability of Alternative Computing Paradigms for Machine Learning: hype or hope?Cristiana Bolchini, Alberto Bosio, Luca Cassano, Bastien Deveautour, Giorgio Di Natale, Antonio Miele, Ian O'Connor, Elena-Ioana Vatajelu
2022DDECSSelective Hardening of Critical Neurons in Deep Neural Networks.Annachiara Ruospo, Gabriele Gavarini, Ilaria Bragaglia, Marcello Traiola, Alberto Bosio, Ernesto Snchez
2022DSNReliability assessment of FreeRTOS in Embedded Systems.Alberto Bosio, Maurizio Rebaudengo, Alessandro Savino
2021DDECSEmerging Technologies: Challenges and Opportunities for Logic Synthesis.Alberto Bosio, Mayeul Cantan, Cdric Marchand, Ian O'Connor, Petr Fiser, Arnaud Poittevin, Marcello Traiola
2021DDECSA Model-Based Framework to Assess the Reliability of Safety-Critical Applications.Lucas Matana Luza, Annachiara Ruospo, Alberto Bosio, Ernesto Snchez, Luigi Dilillo
2021DDECSEfficient Neural Network Approximation via Bayesian Reasoning.Alessandro Savino, Marcello Traiola, Stefano Di Carlo, Alberto Bosio
2021DDECSAdequateDL: Approximating Deep Learning Accelerators.Olivier Sentieys, Silviu-Ioan Filip, David Briand, David Novo, Etienne Dupuis, Ian O'Connor, Alberto Bosio
2021DDECSTutorial: Silicon Systems for Wireless LAN.Zoran Stamenkovic, Hassen Aziza, Ernesto Snchez, Alberto Bosio
2021ETSEmerging Computing Devices: Challenges and Opportunities for Test and ReliabilityAlberto Bosio, Ian O'Connor, Marcello Traiola, Jorge Echavarria, Jrgen Teich, Muhammad Abdullah Hanif, Muhammad Shafique, Said Hamdioui, Bastien Deveautour, Patrick Girard, Arnaud Virazel, Koen Bertels
2021ICCADDesign Space Exploration of Approximation-Based Quadruple Modular Redundancy Circuits.Marcello Traiola, Jorge Echavarria, Alberto Bosio, Jrgen Teich, Ian O'Connor
2021VTSSpecial Session: Operating Systems under test: an overview of the significance of the operating system in the resiliency of the computing continuum.Emmanuel Casseau, Petr Dobis, Oliver Sinnen, Gennaro Severino Rodrigues, Fernanda Lima Kastensmidt, Alessandro Savino, Stefano Di Carlo, Maurizio Rebaudengo, Alberto Bosio
2020DATEOn the Automatic Exploration of Weight Sharing for Deep Neural Network Compression.Etienne Dupuis, David Novo, Ian O'Connor, Alberto Bosio
2020DATEMaximizing Yield for Approximate Integrated Circuits.Marcello Traiola, Arnaud Virazel, Patrick Girard, Mario Barbareschi, Alberto Bosio
2020DDECSSensitivity Analysis and Compression Opportunities in DNNs Using Weight Sharing.Etienne Dupuis, David Novo, Ian O'Connor, Alberto Bosio
2020DSDEvaluating Convolutional Neural Networks Reliability depending on their Data Representation.Annachiara Ruospo, Alberto Bosio, Alessandro Ianne, Ernesto Snchez
2020DSNCross-Layer Soft-Error Resilience Analysis of Computing Systems.Alberto Bosio, Ramon Canal, Stefano Di Carlo, Dimitris Gizopoulos, Alessandro Savino
2020ETSDesign, Verification, Test and In-Field Implications of Approximate Computing Systems.Alberto Bosio, Stefano Di Carlo, Patrick Girard, Ernesto Snchez, Alessandro Savino, Luks Sekanina, Marcello Traiola, Zdenek Vascek, Arnaud Virazel
2020ETSLearning-Based Cell-Aware Defect Diagnosis of Customer Returns.Safa Mhamdi, Patrick Girard, Arnaud Virazel, Alberto Bosio, Aymen Ladhar
2020ITCA Learning-Based Cell-Aware Diagnosis Flow for Industrial Customer Returns.Safa Mhamdi, Patrick Girard, Arnaud Virazel, Alberto Bosio, Aymen Ladhar
2019ETSAlternatives to Fault Injections for Early Safety/Security Evaluations.Michele Portolan, Alessandro Savino, Rgis Leveugle, Stefano Di Carlo, Alberto Bosio, Giorgio Di Natale
2019IOLTSTowards Improvement of Mission Mode Failure Diagnosis for System-on-Chip.Safa Mhamdi, Arnaud Virazel, Patrick Girard, Alberto Bosio, Etienne Auvray, Eric Faehn, Aymen Ladhar
2019ITCInternational Symposium on Design and Diagnostics of Electronic Circuits and Systems.Zoran Stamenkovic, Alberto Bosio, Gyrgy Cserey, Ondrej Novk, Witold A. Pleskacz, Luks Sekanina, Andreas Steininger, Goran Stojanovic, Viera Stopjakov
2018DDECSSynthesis of Finite State Machines on Memristor Crossbars.Umberto Ferrandino, Marcello Traiola, Mario Barbareschi, Antonino Mazzeo, Petr Fiser, Alberto Bosio
2018DDECSOn the Comparison of Different ATPG Approaches for Approximate Integrated Circuits.Marcello Traiola, Arnaud Virazel, Patrick Girard, Mario Barbareschi, Alberto Bosio
2018IOLTSPerformances VS Reliability: how to exploit Approximate Computing for Safety-Critical applications.Gennaro Severino Rodrigues, Fernanda Lima Kastensmidt, Vincent Pouget, Alberto Bosio
2018IOLTSPredicting the Impact of Functional Approximation: from Component- to Application-Level.Marcello Traiola, Alessandro Savino, Mario Barbareschi, Stefano Di Carlo, Alberto Bosio
2018ITCAn Effective Intra-Cell Diagnosis Flow for Industrial SRAMs.Tien-Phu Ho, Eric Faehn, Arnaud Virazel, Alberto Bosio, Patrick Girard
2018VTSSpecial session: How approximate computing impacts verification, test and reliability.Luks Sekanina, Zdenek Vascek, Alberto Bosio, Marcello Traiola, Paolo Rech, Daniel Oliveira, Fernando Fernandes, Stefano Di Carlo
2017DDECSFormal Design Space Exploration for memristor-based crossbar architecture.Marcello Traiola, Mario Barbareschi, Alberto Bosio
2017DDECSTowards approximation during test of Integrated Circuits.Imran Wali, Marcello Traiola, Arnaud Virazel, Patrick Girard, Mario Barbareschi, Alberto Bosio
2017IOLTSReliability of computing systems: From flip flops to variables.Giorgio Di Natale, Maha Kooli, Alberto Bosio, Michele Portolan, Rgis Leveugle
2016DDECSSystem-level reliability evaluation through cache-aware software-based fault injection.Firas Kaddachi, Maha Kooli, Giorgio Di Natale, Alberto Bosio, Mojtaba Ebrahimi, Mehdi Baradaran Tahoori
2016DDECSA hybrid power modeling approach to enhance high-level power models.Alejandro Nocua, Arnaud Virazel, Alberto Bosio, Patrick Girard, Cyril Chevalier
2016DDECSAn effective approach for functional test programs compaction.Aymen Touati, Alberto Bosio, Patrick Girard, Arnaud Virazel, Paolo Bernardi, Matteo Sonza Reorda
2016ETSA low-cost susceptibility analysis methodology to selectively harden logic circuits.Imran Wali, Bastien Deveautour, Arnaud Virazel, Alberto Bosio, Patrick Girard, Matteo Sonza Reorda
2016IOLTSCache-aware reliability evaluation through LLVM-based analysis and fault injection.Maha Kooli, Giorgio Di Natale, Alberto Bosio
2016ITCCross-layer system reliability assessment framework for hardware faults.Alessandro Vallero, Alessandro Savino, Gianfranco Politano, Stefano Di Carlo, Athanasios Chatzidimitriou, Sotiris Tselonis, Manolis Kaliorakis, Dimitris Gizopoulos, Marc Riera, Ramon Canal, Antonio Gonzlez, Maha Kooli, Alberto Bosio, Giorgio Di Natale
2016VTSThermal issues in test: An overview of the significant aspects and industrial practice.Juergen Alt, Paolo Bernardi, Alberto Bosio, Riccardo Cantoro, Hans G. Kerkhoff, Andreas Leininger, Wolfgang Molzer, Alessandro Motta, Christian Pacha, Alberto Pagani, Alireza Rohani, R. Strasser
2016VTSCache- and register-aware system reliability evaluation based on data lifetime analysis.Maha Kooli, Firas Kaddachi, Giorgio Di Natale, Alberto Bosio
2015DATEExploring the impact of functional test programs re-used for power-aware testing.Aymen Touati, Alberto Bosio, Luigi Dilillo, Patrick Girard, Arnaud Virazel, Paolo Bernardi, Matteo Sonza Reorda
2015DDECSDesign-for-Diagnosis Architecture for Power Switches.Miroslav Valka, Alberto Bosio, Luigi Dilillo, Patrick Girard, Arnaud Virazel, P. Debaud, S. Guilhot
2015ETSAn effective hybrid fault-tolerant architecture for pipelined cores.Imran Wali, Arnaud Virazel, Alberto Bosio, Luigi Dilillo, Patrick Girard
2015IOLTSDesign space exploration and optimization of a Hybrid Fault-Tolerant Architecture.Imran Wali, Arnaud Virazel, Alberto Bosio, Patrick Girard, Matteo Sonza Reorda
2014ASPDACPower supply noise-aware workload assignments for homogeneous 3D MPSoCs with thermal consideration.Yuanqing Cheng, Aida Todri-Sanial, Alberto Bosio, Luigi Dilillo, Patrick Girard, Arnaud Virazel
2014DDECSPath delay test in the presence of multi-aggressor crosstalk, power supply noise and ground bounce.Anu Asokan, Aida Todri-Sanial, Alberto Bosio, Luigi Dilillo, Patrick Girard, Serge Pravossoudovitch, Arnaud Virazel
2014DDECSAn intra-cell defect grading tool.Alberto Bosio, Luigi Dilillo, Patrick Girard, Aida Todri-Sanial, Arnaud Virazel, S. Bernabovi, Paolo Bernardi
2014DDECSTiming-aware ATPG for critical paths with multiple TSVs.Carolina Metzler, Aida Todri-Sanial, Alberto Bosio, Luigi Dilillo, Patrick Girard, Arnaud Virazel
2014DDECSTest and diagnosis of power switches.Miroslav Valka, Alberto Bosio, Luigi Dilillo, Aida Todri, Arnaud Virazel, Patrick Girard, P. Debaud, S. Guilhot
2014DDECSProtecting combinational logic in pipelined microprocessor cores against transient and permanent faults.Imran Wali, Arnaud Virazel, Alberto Bosio, Luigi Dilillo, Patrick Girard, Aida Todri
2014ETSA novel adaptive fault tolerant flip-flop architecture based on TMR.Luca Cassano, Alberto Bosio, Giorgio Di Natale
2014ETSiBoX - Jitter based Power Supply Noise sensor.Miroslav Valka, Alberto Bosio, Luigi Dilillo, Aida Todri, Arnaud Virazel, Patrick Girard, P. Debaud, S. Guilhot
2014VTSTSV aware timing analysis and diagnosis in paths with multiple TSVs.Carolina Metzler, Aida Todri-Sanial, Alberto Bosio, Luigi Dilillo, Patrick Girard, Arnaud Virazel
2013DATETest solution for data retention faults in low-power SRAMs.Leonardo Bonet Zordan, Alberto Bosio, Luigi Dilillo, Patrick Girard, Aida Todri, Arnaud Virazel, Nabil Badereddine
2013ETSComputing detection probability of delay defects in signal line tsvs.Carolina Metzler, Aida Todri-Sanial, Alberto Bosio, Luigi Dilillo, Patrick Girard, Arnaud Virazel, Pascal Vivet, Marc Belleville
2013ETSAnalyzing resistive-open defects in SRAM core-cell under the effect of process variability.Elena I. Vatajelu, Alberto Bosio, Luigi Dilillo, Patrick Girard, Aida Todri, Arnaud Virazel, Nabil Badereddine
2013IOLTSSRAM soft error rate evaluation under atmospheric neutron radiation and PVT variations.Georgios Tsiligiannis, Elena I. Vatajelu, Luigi Dilillo, Alberto Bosio, Patrick Girard, Serge Pravossoudovitch, Aida Todri, Arnaud Virazel, Frederic Wrobel, Frdric Saign
2013ITCOn the reuse of read and write assist circuits to improve test efficiency in low-power SRAMs.Leonardo Bonet Zordan, Alberto Bosio, Luigi Dilillo, Patrick Girard, Aida Todri, Arnaud Virazel, Nabil Badereddine
2013VTSA built-in scheme for testing and repairing voltage regulators of low-power srams.Leonardo Bonet Zordan, Alberto Bosio, Luigi Dilillo, Patrick Girard, Aida Todri, Arnaud Virazel, Nabil Badereddine
2012DATEImpact of resistive-open defects on the heat current of TAS-MRAM architectures.Joao Azevedo, Arnaud Virazel, Alberto Bosio, Luigi Dilillo, Patrick Girard, Aida Todri-Sanial, Guillaume Prenat, Jrmy Alvarez-Herault, Ken Mackay
2012ETSCoupling-based resistive-open defects in TAS-MRAM architectures.Joao Azevedo, Arnaud Virazel, Alberto Bosio, Luigi Dilillo, Patrick Girard, Aida Todri, Guillaume Prenat, Jrmy Alvarez-Herault, Ken Mackay
2012ETSThrough-Silicon-Via resistive-open defect analysis.Carolina Metzler, Aida Todri, Alberto Bosio, Luigi Dilillo, Patrick Girard, Arnaud Virazel
2012ETSDefect analysis in power mode control logic of low-power SRAMs.Leonardo Bonet Zordan, Alberto Bosio, Luigi Dilillo, Patrick Girard, Aida Todri, Arnaud Virazel, Nabil Badereddine
2012IOLTSEvaluation of test algorithms stress effect on SRAMs under neutron radiation.Georgios Tsiligiannis, Luigi Dilillo, Alberto Bosio, Patrick Girard, Aida Todri, Arnaud Virazel, Antoine D. Touboul, Frederic Wrobel, Frdric Saign
2012ITCLow-power SRAMs power mode control logic: Failure analysis and test solutions.Leonardo Bonet Zordan, Alberto Bosio, Luigi Dilillo, Patrick Girard, Aida Todri, Arnaud Virazel, Nabil Badereddine
2012VTSAdvanced test methods for SRAMs.Alberto Bosio, Luigi Dilillo, Patrick Girard, Serge Pravossoudovitch, Arnaud Virazel
2012VTSA pseudo-dynamic comparator for error detection in fault tolerant architectures.D. A. Tran, Arnaud Virazel, Alberto Bosio, Luigi Dilillo, Patrick Girard, Aida Todri, Michael E. Imhof, Hans-Joachim Wunderlich
2011DDECSOn using a SPICE-like TSTAC™ eFlash model for design and test.Pierre-Didier Mauroux, Arnaud Virazel, Alberto Bosio, Luigi Dilillo, Patrick Girard, Serge Pravossoudovitch, Benot Godard, Gilles Festes, Laurent Vachez
2011DDECSA study of path delay variations in the presence of uncorrelated power and ground supply noise.Aida Todri, Alberto Bosio, Luigi Dilillo, Patrick Girard, Serge Pravossoudovitch, Arnaud Virazel
2011DDECSOptimized march test flow for detecting memory faults in SRAM devices under bit line coupling.Leonardo Bonet Zordan, Alberto Bosio, Luigi Dilillo, Patrick Girard, Serge Pravossoudovitch, Arnaud Virazel, Nabil Badereddine
2011ETSA Functional Power Evaluation Flow for Defining Test Power Limits during At-Speed Delay Testing.Miroslav Valka, Alberto Bosio, Luigi Dilillo, Patrick Girard, Serge Pravossoudovitch, Arnaud Virazel, Ernesto Snchez, Mauricio de Carvalho, Matteo Sonza Reorda
2011ITCOn using address scrambling to implement defect tolerance in SRAMs.Renan Alves Fonseca, Luigi Dilillo, Alberto Bosio, Patrick Girard, Serge Pravossoudovitch, Arnaud Virazel, Nabil Badereddine
2010DACA statistical simulation method for reliability analysis of SRAM core-cells.Renan Alves Fonseca, Luigi Dilillo, Alberto Bosio, Patrick Girard, Serge Pravossoudovitch, Arnaud Virazel, Nabil Badereddine
2010DDECSAnalysis of power consumption and transition fault coverage for LOS and LOC testing schemes.Fangmei Wu, Luigi Dilillo, Alberto Bosio, Patrick Girard, Serge Pravossoudovitch, Arnaud Virazel, Junxia Ma, Wei Zhao, Mohammad Tehranipoor, Xiaoqing Wen
2010ETSAnalysis of resistive-bridging defects in SRAM core-cells: A comparative study from 90nm down to 40nm technology nodes.Renan Alves Fonseca, Luigi Dilillo, Alberto Bosio, Patrick Girard, Serge Pravossoudovitch, Arnaud Virazel, Nabil Badereddine
2010ETSSetting test conditions for improving SRAM reliability.Renan Alves Fonseca, Luigi Dilillo, Alberto Bosio, Patrick Girard, Serge Pravossoudovitch, Arnaud Virazel, Nabil Badereddine
2010ETSA two-layer SPICE model of the ATMEL TSTACPierre-Didier Mauroux, Arnaud Virazel, Alberto Bosio, Luigi Dilillo, Patrick Girard, Serge Pravossoudovitch, Benot Godard, Gilles Festes, Laurent Vachez
2010ITCParity prediction synthesis for nano-electronic gate designs.D. A. Tran, Arnaud Virazel, Alberto Bosio, Luigi Dilillo, Patrick Girard, Serge Pravossoudovitch, Hans-Joachim Wunderlich
2010ITCIs test power reduction through X-filling good enough?Fangmei Wu, Luigi Dilillo, Alberto Bosio, Patrick Girard, Serge Pravossoudovitch, Arnaud Virazel, Mohammad Tehranipoor, Kohei Miyase, Xiaoqing Wen, Nisar Ahmed
2010VTSDetecting NBTI induced failures in SRAM core-cells.Renan Alves Fonseca, Luigi Dilillo, Alberto Bosio, Patrick Girard, Serge Pravossoudovitch, Arnaud Virazel, Nabil Badereddine
2009DDECSComprehensive bridging fault diagnosis based on the SLAT paradigm.Youssef Benabboud, Alberto Bosio, Luigi Dilillo, Patrick Girard, Serge Pravossoudovitch, Arnaud Virazel, Laroussi Bouzaida, Isabelle Izaute
2009DDECSAn efficient fault simulation technique for transition faults in non-scan sequential circuits.Alberto Bosio, Patrick Girard, Serge Pravossoudovitch, Paolo Bernardi, Matteo Sonza Reorda
2009ITCNAND flash testing: A preliminary study on actual defects.Pierre-Didier Mauroux, Arnaud Virazel, Alberto Bosio, Luigi Dilillo, Patrick Girard, Serge Pravossoudovitch, Benot Godard
2008DDECSSoC Symbolic Simulation: a case study on delay fault testing.Alberto Bosio, Patrick Girard, Serge Pravossoudovitch, Paolo Bernardi
2008IOLTSA Modular Memory BIST for Optimized Memory Repair.Philipp hler, Alberto Bosio, Giorgio Di Natale, Sybille Hellebrand
2008IOLTSYield Improvement, Fault-Tolerance to the Rescue?.Julien Vial, Alberto Bosio, Patrick Girard, Christian Landrault, Serge Pravossoudovitch, Arnaud Virazel
2008ITCA History-Based Diagnosis Technique for Static and Dynamic Faults in SRAMs.Alexandre Ney, Alberto Bosio, Luigi Dilillo, Patrick Girard, Serge Pravossoudovitch, Arnaud Virazel, Magali Bastian
2008ITCSoC Yield Improvement: Redundant Architectures to the Rescue?Julien Vial, Alberto Bosio, Patrick Girard, Christian Landrault, Serge Pravossoudovitch, Arnaud Virazel
2007DDECSA Mixed Approach for Unified Logic Diagnosis.Alexandre Rousset, Alberto Bosio, Patrick Girard, Christian Landrault, Serge Pravossoudovitch, Arnaud Virazel
2007ETSDERRIC: A Tool for Unified Logic Diagnosis.Alexandre Rousset, Alberto Bosio, Patrick Girard, Christian Landrault, Serge Pravossoudovitch, Arnaud Virazel
2006DATEAutomatic march tests generations for static linked faults in SRAMs.Alfredo Benso, Alberto Bosio, Stefano Di Carlo, Giorgio Di Natale, Paolo Prinetto
2006DDECSA Unique March Test Algorithm for the Wide Spread of Realistic Memory Faults in SRAMs.Alfredo Benso, Alberto Bosio, Stefano Di Carlo, Giorgio Di Natale, Paolo Prinetto
2006ETSA 22n March Test for Realistic Static Linked Faults in SRAMs.Alfredo Benso, Alberto Bosio, Stefano Di Carlo, Giorgio Di Natale, Paolo Prinetto
2005ETSAutomatic March tests generation for static and dynamic faults in SRAMs.Alfredo Benso, Alberto Bosio, Stefano Di Carlo, Giorgio Di Natale, Paolo Prinetto
2005ITCMarch AB, March AB1: new March tests for unlinked dynamic memory faults.Alfredo Benso, Alberto Bosio, Stefano Di Carlo, Giorgio Di Natale, Paolo Prinetto