Euromicro Conference Series on Digital System Design
DSD
C
CORE rank
CORE rank (raw)
C
Fields of research
Computer Systems Engineering · Distributed Computing and Systems Software
Papers indexed
2,448
2001–2025
Papers per year
2001136 peak2025
Most published authors
DSD papers
2,448 records sourced from DBLP. Search titles, filter by year, sort by recency.
| Year | Title | Authors |
|---|---|---|
| 2014 | Comparison of Enhanced Markov Models and Discrete Event Simulation: For Evaluation of Probabilistic Faults in Safety-Critical Real-Time Task Sets. | Stefan Krmer, Peter Raab, Jrgen Mottok, Stanislav Racek |
| 2014 | Critical Path Tracing Based Simulation of Transition Delay Faults. | Jaak Kousaar, Raimund Ubar, Sergei Devadze, Jaan Raik |
| 2014 | Measurement-Based Probabilistic Timing Analysis and Its Impact on Processor Architecture. | Leonidas Kosmidis, Eduardo Quiones, Jaume Abella, Tullio Vardanega, Ian Broster, Francisco J. Cazorla |
| 2014 | FPGA Trojan Detection Using Length-Optimized Ring Oscillators. | Paris Kitsos, Artemios G. Voyiatzis |
| 2014 | Design Techniques for NCL-Based Asynchronous Circuits on Commercial FPGA. | Matthew M. Kim, Paul Beckett |
| 2014 | Combined Impact of NBTI Aging and Process Variations on Noise Margins of Flip-Flops. | Usman Khalid, Antonio Mastrandrea, Mauro Olivieri |
| 2014 | Properties of Dynamically Dead Instructions for Contemporary Architectures. | Marianne J. Jantz, Katherine Wu, Prasad A. Kulkarni |
| 2014 | Morphable Compression Architecture for Efficient Configuration in CGRAs. | Syed Mohammad Asad Hassan Jafri, Muhammad Adeel Tajammul, Masoud Daneshtalab, Ahmed Hemani, Kolin Paul, Peeter Ellervee, Juha Plosila, Hannu Tenhunen |
| 2014 | Design and Implementation of Multiple-Vehicle Detection and Tracking Systems with Machine Learning. | Shen-Fu Hsiao, Guan-Fu Yeh, Je-Chi Chen |
| 2014 | Compression of Lookup Table for Piecewise Polynomial Function Evaluation. | Shen-Fu Hsiao, Chia-Sheng Wen, Po-Han Wu |
| 2014 | Seesaw: An Area-Optimized FPGA Viterbi Decoder for PUFs. | Matthias Hiller, Leandro Rodrigues Lima, Georg Sigl |
| 2014 | HOG Feature Extractor Hardware Accelerator for Real-Time Pedestrian Detection. | Maryam Hemmati, Morteza Biglari-Abhari, Stevan Berber, Smal Niar |
| 2014 | Design Space Exploration for Automotive E/E Architecture Component Platforms. | Sebastian Graf, Michael Gla, Jrgen Teich, Christoph Lauer |
| 2014 | Design Space Exploration in an FPGA-Based Software Defined Radio. | Matthieu Gautier, Ganda Stphane Ouedraogo, Olivier Sentieys |
| 2014 | Designing and Evaluating High Speed Elliptic Curve Point Multipliers. | Apostolos P. Fournaris, John Zafeirakis, Odysseas G. Koufopavlou |
| 2014 | A New Rounding Method Based on Parallel Remainder Estimation for Goldschmidt and Newton-Raphson Algorithms. | Daniel Piso Fernandez, Javier Diaz Bruguera |
| 2014 | Efficient STDP Micro-Architecture for Silicon Spiking Neural Networks. | Sergei Dytckov, Masoud Daneshtalab, Masoumeh Ebrahimi, Hassan Anwar, Juha Plosila, Hannu Tenhunen |
| 2014 | EUROSERVER: Energy Efficient Node for European Micro-Servers. | Yves Durand, Paul M. Carpenter, Stefano Adami, Angelos Bilas, Denis Dutoit, Alexis Farcy, Georgi Gaydadjiev, John Goodacre, Manolis Katevenis, Manolis Marazakis, Emil Mats, Iakovos Mavroidis, John Thomson |
| 2014 | A Flexible and Lightweight ECC-Based Authentication Solution for Resource Constrained Systems. | Norbert Druml, Manuel Menghin, Adnan Kuleta, Christian Steger, Reinhold Weiss, Holger Bock, Josef Haid |
| 2014 | Flexible Radio Interface for NoC RF-Interconnect. | Frederic Drillet, Mohamad Hamieh, Lounis Zerioul, Alexandre Briere, Eren Unlu, Myriam Ariaudo, Yves Lout, Emmanuelle Bourdel, Julien Denoulet, Andra Pinna, Bertrand Granado, Patrick Garda, Franois Pcheux, Cedric Duperrier, Sbastien Quintanel, Philippe Meunier, Christophe Moy, Olivier Romain |
| 2014 | A Time Synchronization Circuit with an Average 4.6 ns One-Hop Skew for Wired Wearable Networks. | Fardin Derogarian, Joo Canas Ferreira, Vtor M. Grade Tavares |
| 2014 | Circuits and Synthesis Mechanism for Hardware Design to Counter Power Analysis Attacks. | Partha De, Kunal Banerjee, Chittaranjan A. Mandal, Debdeep Mukhopadhyay |
| 2014 | A 130 nm Event-Driven Voltage and Temperature Insensitive Capacitive ROC. | Alessia Damilano, Marco Crepaldi, Paolo Motto Ros, Danilo Demarchi |
| 2014 | Design Space Exploration for Customized Asymmetric Heterogeneous MPSoC. | Bouthaina Damak, Rachid Benmansour, Mouna Baklouti, Smal Niar, Mohamed Abid |
| 2014 | Gigasample Time-Interleaved Delta-Sigma Modulator for FPGA-Based All-Digital Transmitters. | Rui Fiel Cordeiro, Arnaldo S. R. Oliveira, Jos M. N. Vieira, Nelson V. Silva |
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Comparable venues
Other A*/A conferences filed under the same field of research.
- ADATEDesign, Automation and Test in Europe Conference
- A*DACDesign Automation Conf
- ASCInternational Conference for High Performance Computing, Networking, Storage and Analysis (was Supercomputing Conference)
- AICCADIEEE/ACM International Conference on Computer-Aided Design
- AITCIEEE International Test Conference
- A*ISCAACM International Symposium on Computer Architecture
- A*MICROInternational Symposium on Microarchitecture
- AISLPEDIEEE/ACM International Symposium on Low Power Electronics and Design