| 2005 | Efficient Implementation of Digital Filters with Use of Advanced Synthesis Methods Targeted FPGA Architectures. | Mariusz Rawski, Pawel Tomaszewicz, Henry Selvaraj, Tadeusz Luba |
| 2005 | Improved Fault Emulation for Synchronous Sequential Circuits. | Jaan Raik, Peeter Ellervee, Valentin Tihhomirov, Raimund Ubar |
| 2005 | SystemC-based Design Methodology for Reconfigurable System-on-Chip. | Yang Qu, Kari Tiensyrj, Juha-Pekka Soininen |
| 2005 | High-Level Modelling and Detection of the Faulty Behaviour of VOQ Switches under Balanced Traffic. | Miguel Pereira, Enrique Soto, Juan J. Rodrguez-Andina, Francisco J. Gonzlez-Castao |
| 2005 | Delay Testability Properties of Circuits Implementing Threshold and Symmetric Functions. | Piotr Patronik |
| 2005 | Reconfigurable Parallel Approximate String Matching on FPGAs. | Jin Hwan Park |
| 2005 | Run-time Adaptive Resources Allocation and Balancing on Nanoprocessors Arrays. | Danilo Pani, Giuseppe Passino, Luigi Raffo |
| 2005 | A New Architecture for fast Arithmetic Coding in H.264 Advanced Video Coder. | Roberto R. Osorio, Javier D. Bruguera |
| 2005 | ARPA - A Technology Independent and Synthetizable System-on-Chip Model for Real-Time Applications. | Arnaldo S. R. Oliveira, Valery Sklyarov, Antnio de Brito Ferrari |
| 2005 | Internet-Based IC Technology Design and Simulation. | Vladislav Nelayev, Viktor Stempitsky, Kirill A. Kudin |
| 2005 | Massively Parallel Hardware Architecture for Genetic Algorithms. | Nadia Nedjah, Luiza de Macedo Mourelle |
| 2005 | Reducing Inter-Configuration Memory Usage and Performance Improvement in Reconfigurable Computing Systems. | Farhad Mehdipour, Morteza Saheb Zamani, Mehdi Sedighi |
| 2005 | A high-level tool for the design of custom image processing systems. | Srgio Martins, Jos Carlos Alves |
| 2005 | Formal Communication Semantics of SystemC | Ka L. Man |
| 2005 | MA2TG: A Functional Test Program Generator for Microprocessor Verification. | Tun Li, Dan Zhu, Yang Guo, GongJie Liu, Sikun Li |
| 2005 | A Low-Power FIR Filter Using Combined Residue and Radix-2 Signed-Digit Representation. | Andreas Lindahl, Lars Bengtsson |
| 2005 | Functional Vectors Generation for RT-Level Verilog Descriptions Based on Path Enumeration and Constraint Logic Programming. | Tun Li, Yang Guo, GongJie Liu, Sikun Li |
| 2005 | Optimization of a Bus-based Test Data Transportation Mechanism in System-on-Chip. | Anders Larsson, Erik Larsson, Petru Eles, Zebo Peng |
| 2005 | Co-simulation of Wireless Local Area Network Terminals with Protocol Software Implemented in SDL. | Petri Kukkala, Marko Hnnikinen, Timo D. Hmlinen |
| 2005 | BIST Technique for GALS Systems. | Milos Krstic, Eckhard Grass |
| 2005 | Wireless Sensor Network Implementation for Industrial Linear Position Metering. | Mikko Kohvakka, Marko Hnnikinen, Timo D. Hmlinen |
| 2005 | Hardware-Based Implementation of the Common Approximate Substring Algorithm. | Kenneth B. Kent, Sharon Van Schaick, Jacqueline E. Rice, Patricia A. Evans |
| 2005 | Throughput of Streaming Applications Running on a Multiprocessor Architecture. | Nikolay Kavaldjiev, Gerard J. M. Smit, Pierre G. Jansen |
| 2005 | Validation of Embedded Systems Using Formal Method Aided Simulation. | Daniel Karlsson, Petru Eles, Zebo Peng |
| 2005 | Decomposition of Multi-Output Functions for CPLDs. | Dariusz Kania, Adam Milik, Jzef Kulisz |