| 2023 | Model-Platform Optimized Deep Neural Network Accelerator Generation through Mixed-Integer Geometric Programming. | Yuhao Ding, Jiajun Wu, Yizhao Gao, Maolin Wang, Hayden Kwok-Hay So |
| 2023 | UPTRA: An Ultra-Parameterized Temporal CGRA Modeling and Optimization. | Yuan Dai, Yunhui Qiu, Qilong Zhu, Jingyuan Li, Wenbo Yin, Lingli Wang |
| 2023 | Decision Forest Training Accelerator Based on Binary Feature Decomposition. | Thiem Van Chu, Yu Mizutani, Yuta Nagahara, Shungo Kumazawa, Kazushi Kawamura, Jaehoon Yu, Masato Motomura |
| 2023 | Hardware/Software Co-design for Machine Learning Accelerators. | Hanqiu Chen, Cong Hao |
| 2023 | DGNN-Booster: A Generic FPGA Accelerator Framework For Dynamic Graph Neural Network Inference. | Hanqiu Chen, Cong Hao |
| 2023 | BRAMAC: Compute-in-BRAM Architectures for Multiply-Accumulate on FPGAs. | Yuzong Chen, Mohamed S. Abdelfattah |
| 2023 | ATHEENA: A Toolflow for Hardware Early-Exit Network Automation. | Benjamin Biggs, Christos-Savvas Bouganis, George A. Constantinides |
| 2023 | Accelerating Graph Analytics with oneAPI and Intel FPGAs. | James Bickerstaff, Luke Kljucaric, Alan D. George |
| 2023 | MSBF-LSTM: Most-significant Bit-first LSTM Accelerators with Energy Efficiency Optimisations. | Sige Bian, He Li, Chengcheng Wang, Changjun Song, Yongming Tang |
| 2023 | Transformer-OPU: An FPGA-based Overlay Processor for Transformer Networks. | Yueyin Bai, Hao Zhou, Keqing Zhao, Jianli Chen, Jun Yu, Kun Wang |
| 2023 | FASBM: FPGA-specific Approximate Sum-based Booth multipliers for energy efficient Hardware Acceleration of Image Processing and Machine Learning Applications. | Zainab Aizaz, Kavita Khare, Aizaz Tirmizi |
| 2023 | MSD: Mixing Signed Digit Representations for Hardware-efficient DNN Acceleration on FPGA with Heterogeneous Resources. | Jiajun Wu, Jiajun Zhou, Yizhao Gao, Yuhao Ding, Ngai Wong, Hayden Kwok-Hay So |
| 2023 | b8c: SpMV accelerator implementation leveraging high memory bandwidth. | Jos Oliver, Carlos lvarez, Teresa Cervero, Xavier Martorell, John D. Davis, Eduard Ayguad |
| 2023 | An Efficient Piecewise Linear Approximation of Non-linear Operations for Transformer Inference. | Haodong Lu, Qichang Mei, Kun Wang |
| 2022 | FPGA-based Accelerators System with Low Latency Autonomous DMA Engine. | Tomoya Yokono, Yoshiro Yamabe, Kenji Tanaka, Yuki Arikawa, Teruaki Ishizaki |
| 2022 | FPGA Accelerator for Homomorphic Encrypted Sparse Convolutional Neural Network Inference. | Yang Yang, Sanmukh R. Kuppannagari, Rajgopal Kannan, Viktor K. Prasanna |
| 2022 | An FPGA Accelerator for Genome Variant Calling. | Tiancheng Xu, Scott Rixner, Alan L. Cox |
| 2022 | TFR-GCN: A GCN Accelerator with Tile-Fusing Strategy. | Shengjun Xu, Wenjin Huang, Yihua Huang |
| 2022 | Dual-Line-Systolic Array for High Performance CNN Accelerator. | Peng Xue, Lunshuai Pan, Litao Sun, Mingqiang Huang |
| 2022 | Scheduling of Hardware Tasks in Reconfigurable Mixed-Criticality Systems. | Cornelia Wulf, Najdet Charaf, Diana Goehringer |
| 2022 | A High-Performance Hardware Architecture for ECC Point Multiplication over Curve25519. | Guiming Wu, Qianwen He, Jiali Jiang, Zhenxiang Zhang, Xin Long, Yuan Zhao, Yinchao Zou |
| 2022 | Leveraging FPGA Runtime Reconfigurability to Implement Multi-Hash-Chain Proof-of-Work. | Tong Wu, Oliver Diessel |
| 2022 | DQI: A Dynamic Quantization Method for Efficient Convolutional Neural Network Inference Accelerators. | Yun Wang, Qiang Liu, Shun Yan |
| 2022 | IMpress: Large Integer Multiplication Expression Rewriting for FPGA HLS. | Ecenur Ustun, Ismail San, Jiaqi Yin, Cunxi Yu, Zhiru Zhang |
| 2022 | A Scalable Distributed Radix Sorter for FPGA Clusters using High-Bandwidth Memory Networks. | Yutaka Urino, Takanori Shimizu, Hiroshi Yamaguchi, Kenji Mizutani, Shigeru Nakamura, Tatsuya Usuki, Michihiro Koibuchi |