| 2021 | Flexible Instrumentation for Live On-Chip Debug of Machine Learning Training on FPGAs. | Daniel Holanda Noronha, Zhiqiang Que, Wayne Luk, Steven J. E. Wilton |
| 2021 | Enabling OpenMP Task Parallelism on Multi-FPGAs. | Ramon Nepomuceno, Renan Sterle, Guilherme Valarini, Mrcio Machado Pereira, Herv Yviquel, Guido Araujo |
| 2021 | NullaNet Tiny: Ultra-low-latency DNN Inference Through Fixed-function Combinational Logic. | Mahdi Nazemi, Arash Fayyazi, Amirhossein Esmaili, Atharva Khare, Soheil Nazar Shahsavani, Massoud Pedram |
| 2021 | HLS-Compatible, Embedded-Processor Stream Links. | Eric Micallef, Yuanlong Xiao, Andr DeHon |
| 2021 | TOCO: A Systolic Network for Efficient Transposed Convolutions with Output-Reuse Paths. | Zhengzheng Ma, Guojie Luo |
| 2021 | Using hls4ml to Map Convolutional Neural Networks on Interconnected FPGA Devices. | Evangelos Mageiropoulos, Nikolaos Chrysos, Nikolaos Dimou, Manolis Katevenis |
| 2021 | AutoTEA: Automated Transistor-level Efficient and Accurate Optimization for GRM FPGA Design. | Yanze Li, Yufan Zhang, Jiafeng Liu, Jian Wang, Jinmei Lai, Gang Qu |
| 2021 | DMA Medusa: A Vendor-Independent FPGA-Based Architecture for 400 Gbps DMA Transfers. | Jan Kublek, Jakub Cabal, Martin Spinler, Radek Isa |
| 2021 | Accelerating Large-Scale Nearest Neighbor Search with Computational Storage Device. | Ji-Hoon Kim, Yeo-Reum Park, Jaeyoung Do, Soo Young Ji, Joo-Young Kim |
| 2021 | An FPGA Based Hardware Accelerated Framework for Solar Spectra Matching with Parameterized Matched Filter IP Core. | Verjina Torosian Khouygani, Shahnam Mirzaei, Christian Beck, Debi Prasad Choudhary |
| 2021 | FA-LAMP: FPGA-Accelerated Learned Approximate Matrix Profile for Time Series Similarity Prediction. | Amin Kalantar, Zachary Zimmerman, Philip Brisk |
| 2021 | Optimized FPGA-based Deep Learning Accelerator for Sparse CNN using High Bandwidth Memory. | Chao Jiang, David Ojika, Bhavesh Patel, Herman Lam |
| 2021 | TwinDNN: A Tale of Two Deep Neural Networks. | Hyunmin Jeong, Deming Chen |
| 2021 | Clockwork: Resource-Efficient Static Scheduling for Multi-Rate Image Processing Applications on FPGAs. | Dillon Huff, Steve Dai, Pat Hanrahan |
| 2021 | XBERT: Xilinx Logical-Level Bitstream Embedded RAM Transfusion. | Matthew Hofmann, Zhiyao Tang, Jonathan Orgill, Jonathan Nelson, David Glanzman, Brent Nelson, Andr DeHon |
| 2021 | An Empirical Study of the Reliability of High-Level Synthesis Tools. | Yann Herklotz, Zewei Du, Nadesh Ramanathan, John Wickerson |
| 2021 | ARC: Reconfigurable Cache Security Assurance with Application-Specific Randomized Mapping in FPGA-Based Heterogeneous Computing. | Sanjay Gandham, Rakin Muhammad Shadab, Mingjie Lin |
| 2021 | A Tunable Dual-Edge Time-to-Digital Converter. | Colin Drewes, Steven Harris, Winnie Wang, Richard Appen, Olivia Weng, Ryan Kastner, William Hunter, Christopher McCarty, Dustin Richmond |
| 2021 | HAO: Hardware-aware Neural Architecture Optimization for Efficient Inference. | Zhen Dong, Yizhao Gao, Qijing Huang, John Wawrzynek, Hayden K. H. So, Kurt Keutzer |
| 2021 | 3D-VNPU: A Flexible Accelerator for 2D/3D CNNs on FPGA. | Huipeng Deng, Jian Wang, Huafeng Ye, Shanlin Xiao, Xiangyu Meng, Zhiyi Yu |
| 2021 | Extending High-Level Synthesis for Task-Parallel Programs. | Yuze Chi, Licheng Guo, Jason Lau, Young-kyu Choi, Jie Wang, Jason Cong |
| 2021 | Time-Domain FPGA Power Delivery Network Characterization Methodology. | Yanran P. Chen, Martin L. Voogel, Ed Priest, Qian Wang, Ranjeeth Doppalapudi, Praful Jain |
| 2021 | Probabilistic Scheduling in High-Level Synthesis. | Jianyi Cheng, John Wickerson, George A. Constantinides |
| 2021 | ESCA: Event-Based Split-CNN Architecture with Data-Level Parallelism on UltraScale+ FPGA. | Pankaj Bhowmik, Md Jubaer Hossain Pantho, Joel Mandebi Mbongue, Christophe Bobda |
| 2021 | Reconfigurable Synthesizable Synchronization FIFOs. | Ameer M. S. Abdelhadi, He Li |