| 2014 | Compiling Higher Order Functional Programs to Composable Digital Hardware. | Eduardo Aguilar-Pelaez, Samuel Bayliss, Alex I. Smith, Felix Winterstein, Dan R. Ghica, David B. Thomas, George A. Constantinides |
| 2014 | Look-up Table Design for Deep Sub-threshold through Full-Supply Operation. | Monther Abusultan, Sunil P. Khatri |
| 2014 | An Architectural Approach to Characterizing and Eliminating Sources of Inefficiency in a Soft Processor Design. | Kaveh Aasaraai, Andreas Moshovos |
| 2013 | Binding Hardware IPs to Specific FPGA Device via Inter-twining the PUF Response with the FSM of Sequential Circuits. | Jiliang Zhang, Yaping Lin, Yongqiang Lu, Ray C. C. Cheung, Wenjie Che, Qiang Zhou, Jinian Bian |
| 2013 | An Evaluation of High-Performance Embedded Processing on MPPAs. | Zain-ul-Abdin, Bertil Svensson |
| 2013 | Efficient Large Integer Squarers on FPGA. | Simin Xu, Suhaib A. Fahmy, Ian Vince McLoughlin |
| 2013 | Parallel Computation of Skyline Queries. | Louis Woods, Gustavo Alonso, Jens Teubner |
| 2013 | An Approach to a Fully Automated Partial Reconfiguration Design Flow. | Kizheppatt Vipin, Suhaib A. Fahmy |
| 2013 | FAssem: FPGA Based Acceleration of De Novo Genome Assembly. | B. Sharat Chandra Varma, Kolin Paul, M. Balakrishnan, Dominique Lavenier |
| 2013 | Parallel Generation of Gaussian Random Numbers Using the Table-Hadamard Transform. | David B. Thomas |
| 2013 | A Reconfigurable Architecture for 1-D and 2-D Discrete Wavelet Transform. | Qing Sun, Jiang Jiang, Yongxin Zhu, Yuzhuo Fu |
| 2013 | Hardware-Software Codesign for Embedded Numerical Acceleration. | Ranko Sredojevic, Andrew Wright, Vladimir Stojanovic |
| 2013 | Open-Source Bitstream Generation. | Ritesh Kumar Soni, Neil Steiner, Matthew French |
| 2013 | Accuracy-Performance Tradeoffs on an FPGA through Overclocking. | Kan Shi, David Boland, George A. Constantinides |
| 2013 | A Fast and Accurate FPGA-Based Fault Injection System. | Thomas Schweizer, Dustin Peterson, Johannes Maximilian Khn, Tommy Kuhn, Wolfgang Rosenstiel |
| 2013 | An FPGA-Based Data Flow Engine for Gaussian Copula Model. | Huabin Ruan, Xiaomeng Huang, Haohuan Fu, Guangwen Yang, Wayne Luk, Sbastien Racanire, Oliver Pell, Wenjing Han |
| 2013 | Application Composition and Communication Optimization in Iterative Solvers Using FPGAs. | Abid Rafique, Nachiket Kapre, George A. Constantinides |
| 2013 | A Case for Heterogeneous Technology-Mapping: Soft Versus Hard Multiplexers. | Madhura Purnaprajna, Paolo Ienne |
| 2013 | Accelerating the Computation of Induced Dipoles for Molecular Mechanics with Dataflow Engines. | Frederico Pratas, Diego Oriato, Oliver Pell, Ricardo A. Mata, Leonel Sousa |
| 2013 | Image Segmentation Using Hardware Forest Classifiers. | Richard Neil Pittman, Alessandro Forin, Antonio Criminisi, Jamie Shotton, Atabak Mahram |
| 2013 | A Multithreaded VLIW Soft Processor Family. | Kalin Ovtcharov, Ilian Tili, J. Gregory Steffan |
| 2013 | Automating Elimination of Idle Functions by Run-Time Reconfiguration. | Xinyu Niu, Thomas C. P. Chau, Qiwei Jin, Wayne Luk, Qiang Liu |
| 2013 | A High Throughput No-Stall Golomb-Rice Hardware Decoder. | Roger Moussalli, Walid A. Najjar, Xi Luo, Amna Khan |
| 2013 | On-chip Context Save and Restore of Hardware Tasks on Partially Reconfigurable FPGAs. | Aurelio Morales-Villanueva, Ann Gordon-Ross |
| 2013 | On Optimizing the Arithmetic Precision of MCMC Algorithms. | Grigorios Mingas, Farhan Rahman, Christos-Savvas Bouganis |