| 2011 | Architecture, Design, and Experimental Evaluation of a Lightfield Descriptor Depth Buffer Algorithm on Reconfigurable Logic and on a GPU. | Matina Lakka, Grigorios Chrysos, Ioannis Papaefstathiou, Apostolos Dollas |
| 2011 | Automatic HDL-Based Generation of Homogeneous Hard Macros for FPGAs. | Sebastian Korf, Dario Cozzi, Markus Koester, Jens Hagemeyer, Mario Porrmann, Ulrich Rckert, Marco D. Santambrogio |
| 2011 | An Autonomous Vector/Scalar Floating Point Coprocessor for FPGAs. | Jainik Kathiara, Miriam Leeser |
| 2011 | On Comparing Financial Option Price Solvers on FPGA. | Qiwei Jin, Wayne Luk, David B. Thomas |
| 2011 | FUSE: Front-End User Framework for O/S Abstraction of Hardware Accelerators. | Aws Ismail, Lesley Shannon |
| 2011 | Automated Placement for Parallelized FPGA FFTs. | Suraj Gowda, Aaron Parsons, Robert Jarnot, Dan Werthimer |
| 2011 | Modeling Dynamically Reconfigurable Systems for Simulation-Based Functional Verification. | Lingkan Gong, Oliver Diessel |
| 2011 | Using Functional Programming to Generate an LDPC Forward Error Corrector. | Andy Gill, Tristan Bull, Daniel DePardo, Andrew Farmer, Ed Komp, Erik Perrins |
| 2011 | String Matching in Hardware Using the FM-Index. | Edward Fernandez, Walid A. Najjar, Stefano Lonardi |
| 2011 | Hybrid Data Structure for IP Lookup in Virtual Routers Using FPGAs. | Oguzhan Erdem, Hoang Le, Viktor K. Prasanna, Cneyt F. Bazlamaci |
| 2011 | Hecto-Scale Frame Rate Face Detection System for SVGA Source on FPGA Board. | Zheng Ding, Feng Zhao, Tinghui Wang, Wei Shu, Min-You Wu |
| 2011 | Mixed Precision Processing in Reconfigurable Systems. | Gary Chun Tak Chow, K. W. Kwok, Wayne Luk, Philip Heng Wai Leong |
| 2011 | Efficient Calculation of Pairwise Nonbonded Forces. | Matt Chiu, Md. Ashfaquzzaman Khan, Martin C. Herbordt |
| 2011 | Accelerating Statistical LOR Estimation for a High-Resolution PET Scanner Using FPGA Devices and a High Level Synthesis Tool. | Zhong-Ho Chen, Alvin Wen-Yu Su, Ming-Ting Sun, Scott Hauck |
| 2011 | A Key Size Configurable High Speed RSA Coprocessor. | Emilio Castillo, Javier Castillo, Javier Cano, Pablo Huerta, Jos Ignacio Martnez |
| 2011 | Towards Synthesis-Free JIT Compilation to Commodity FPGAs. | Davor Capalija, Tarek S. Abdelrahman |
| 2011 | FPGA-Based Solid-State Drive Prototyping Platform. | Yu Cai, Erich F. Haratsch, Mark P. McCartney, Ken Mai |
| 2011 | The PowerPC 405 Memory Sentinel and Injection System. | Mark Bucciero, John Paul Walters, Roger Moussalli, Shanyuan Gao, Matthew French |
| 2011 | An FPGA Implementation of Information Theoretic Visual-Saliency System and Its Optimization. | Sungmin Bae, Yong Cheol Peter Cho, Sungho Park, Kevin M. Irick, Yongseok Jin, Vijaykrishnan Narayanan |
| 2011 | Reducing the Energy Cost of Irregular Code Bases in Soft Processor Systems. | Manish Arora, Jack Sampson, Nathan Goulding-Hotta, Jonathan Babb, Ganesh Venkatesh, Michael Bedford Taylor, Steven Swanson |
| 2011 | Accelerating Phylogeny-Aware Short DNA Read Alignment with FPGAs. | Nikolaos Alachiotis, Simon A. Berger, Alexandros Stamatakis |
| 2011 | Run-Time Resource Allocation for Simultaneous Multi-tasking in Multi-core Reconfigurable Processors. | Waheed Ahmed, Muhammad Shafique, Lars Bauer, Manuel Hammerich, Jrg Henkel, Jrgen Becker |
| 2010 | Using the Power Side Channel of FPGAs for Communication. | Daniel Ziener, Florian Baueregger, Jrgen Teich |
| 2010 | Impulse C vs. VHDL for Accelerating Tomographic Reconstruction. | Jimmy Xu, Nikhil Subramanian, Adam M. Alessio, Scott Hauck |
| 2010 | Blocking LU Decomposition for FPGAs. | Guiming Wu, Yong Dou, Gregory D. Peterson |