| 2007 | On Solving RC5 Challenges with FPGAs. | Guerric Meurice de Dormale, John Bass, Jean-Jacques Quisquater |
| 2007 | RBoot: Software Infrastructure for a Remote FPGA Laboratory. | Kushal Datta, Ron Sass |
| 2007 | Generating FPGA-Accelerated DFT Libraries. | Paolo D'Alberto, Peter A. Milder, Aliaksei Sandryhaila, Franz Franchetti, James C. Hoe, Jos M. F. Moura, Markus Pschel, Jeremy R. Johnson |
| 2007 | An Integrated Video Compression, Encryption and Information Hiding Architecture based on the SCAN Algorithm and the Stretch Technology. | Grigorios Chrysos, Apostolos Dollas, Nikolaos G. Bourbakis, J. Sukarno Mertoguno |
| 2007 | Hardware/Software co-design of a key point detector on FPGA. | Harding Djakou Chati, Felix Mhlbauer, Tim Braun, Christophe Bobda, Karsten Berns |
| 2007 | Jumble: A Hardware-in-the-Loop Simulation System for JHDL. | David Castells-Rufas, Jordi Carrabina |
| 2007 | A Structural Object Programming Model, Architecture, Chip and Tools for Reconfigurable Computing. | Michael Butts, Anthony Mark Jones, Paul Wasson |
| 2007 | Efficient Mapping of Dimensionality Reduction Designs onto Heterogeneous FPGAs. | Christos-Savvas Bouganis, Iosifina Pournara, Peter Y. K. Cheung |
| 2007 | Automatic Self-Reconfiguration of System-on-Chip Peripherals. | Neil W. Bergmann, Yi Lu, John A. Williams |
| 2007 | Design and Implementation of a Highly Parameterised FPGA-Based Skeleton for Pairwise Biological Sequence Alignment. | Khaled Benkrid, Ying Liu, Abdsamad Benkrid |
| 2007 | Enhancing Relocatability of Partial Bitstreams for Run-Time Reconfiguration. | Tobias Becker, Wayne Luk, Peter Y. K. Cheung |
| 2007 | Rapid Prototyping of Large-scale Analog Circuits With Field Programmable Analog Array. | I. Faik Baskaya, Brian Gestner, Christopher M. Twigg, Sung Kyu Lim, David V. Anderson, Paul E. Hasler |
| 2007 | FPGA Acceleration of Gene Rearrangement Analysis. | Jason D. Bakos |
| 2007 | Matched Filter Computation on FPGA, Cell and GPU. | Zachary K. Baker, Maya B. Gokhale, Justin L. Tripp |
| 2007 | On the Acceleration of Shortest Path Calculations in Transportation Networks. | Zachary K. Baker, Maya B. Gokhale |
| 2007 | Code Compressor and Decompressor for Ultra Large Instruction Width Coarse-Grain Reconfigurable Systems. | Nazish Aslam, Mark Milward, Ioannis Nousias, Tughrul Arslan, Ahmet T. Erdogan |
| 2007 | A Hybrid Memory Sub-system for Video Coding Applications. | Su-Shin Ang, George A. Constantinides, Wayne Luk, Peter Y. K. Cheung |
| 2007 | A Flexible Filter Processor for Fading Channel Simulation. | Amirhossein Alimohammad, Saeed Fouladi Fard, Bruce F. Cockburn, Christian Schlegel |
| 2006 | Automatic Sliding Window Operation Optimization for FPGA-Based. | Haiqian Yu, Miriam Leeser |
| 2006 | A Type Architecture for Hybrid Micro-Parallel Computers. | Benjamin Ylvisaker, Brian Van Essen, Carl Ebeling |
| 2006 | DSynth: A Pipeline Synthesis Environment for FPGAs. | Michael J. Wirthlin, Welson Sun |
| 2006 | A Reconfigurable Cluster-on-Chip Architecture with MPI Communication Layer. | John A. Williams, Irfan Syed, Jason Wu, Neil W. Bergmann |
| 2006 | An FPGA Solution for Radiation Dose Calculation. | Kevin Whitton, Xiaobo Sharon Hu, Cedric X. Yu, Danny Z. Chen |
| 2006 | VPN Acceleration Using Reconfigurable System-On-Chip Technology. | Chin Mun Wee, Peter R. Sutton, Neil W. Bergmann, John A. Williams |
| 2006 | Defect-Tolerant Nanocomputing Using Bloom Filters. | Gang Wang, Wenrui Gong, Ryan Kastner |