| 2006 | Hardware/Software Integration for FPGA-based All-Pairs Shortest-Paths. | Uday Bondhugula, Ananth Devulapalli, James Dinan, Joseph Fernando, Pete Wyckoff, Eric Stahlberg, P. Sadayappan |
| 2006 | A Parallel Hardware Architecture for fast Gaussian Elimination over GF(2). | Andrey Bogdanov, M. C. Mertens, Christof Paar, Jan Pelzl, Andy Rupp |
| 2006 | Floating-Point Accumulation Circuit for Matrix Applications. | Michael R. Bodnar, John R. Humphrey, Petersen F. Curt, James P. Durbano, Dennis W. Prather |
| 2006 | Template-Based Generation of Streaming Accelators from a High Level Presentation. | Nikolaos Bellas, Sek M. Chai, Malcolm Dwyer, Dan Linzmeier |
| 2006 | An Architecture for Efficient Hardware Data Mining using Reconfigurable Computing Systems. | Zachary K. Baker, Viktor K. Prasanna |
| 2006 | Systematic Characterization of Programmable Packet Processing Pipelines. | Michael Attig, Gordon J. Brebner |
| 2006 | Effects of High-Level Discrete Signal Transform Formulations on Partitioning for Multi-FPGA Architectures. | Rafael A. Arce-Nazario, Manuel Jimnez, Domingo Rodrguez |
| 2006 | Enabling a Uniform Programming Model Across the Software/Hardware Boundary. | Erik K. Anderson, Jason Agron, Wesley Peck, Jim Stevens, Fabrice Baijot, Ed Komp, Ron Sass, David Andrews |
| 2006 | Design of a Reconfigurable Processor for NIST Prime Field ECC. | Kendall Ananyi, Daler N. Rakhmatov |
| 2005 | Exploiting Multi-Grained Parallelism in Reconfigurable SBC Architectures. | Joseph Zambreno, Daniel Honbo, Alok N. Choudhary |
| 2005 | Conference Organizers. | |
| 2005 | FIFO Communication Models in Operating Systems for Reconfigurable Computing. | John A. Williams, Neil W. Bergmann, Xin Xie |
| 2005 | Metropolitan Road Traffic Simulation on FPGAs. | Justin L. Tripp, Henning S. Mortveit, Anders A. Hansson, Maya B. Gokhale |
| 2005 | Prototyping Architectural Support for Program Rollback Using FPGAs. | Radu Teodorescu, Josep Torrellas |
| 2005 | Mutable Codesign for Embedded Protocol Processing. | Todd S. Sproull, Gordon J. Brebner, Christopher E. Neely |
| 2005 | An Architecture for Video Compression Based on the SCAN Algorithm. | H. Sofikitis, K. Roumpou, Apostolos Dollas, Nikolaos G. Bourbakis |
| 2005 | A Signature Match Processor Architecture for Network Intrusion Detection. | Janardhan Singaraju, Long Bu, John A. Chandy |
| 2005 | Hardware Factorization Based on Elliptic Curve Method. | Martin Simka, Jan Pelzl, Thorsten Kleinjung, Jens Franke, Christine Priplata, Colin Stahlke, Milos Drutarovsk, Viktor Fischer |
| 2005 | Simplifying the Integration of Processing Elements in Computing Systems Using a Programmable Controller. | Lesley Shannon, Paul Chow |
| 2005 | Terrestrial-Based Radiation Upsets: A Cautionary Tale. | Heather Quinn, Paul S. Graham |
| 2005 | Automating the Layout of Reconfigurable Subsystems Using Circuit Generators. | Shawn Phillips, Scott Hauck |
| 2005 | COMA: A COoperative MAnagement Scheme for Energy Efficient Implementation of Real-Time Operating Systems on FPGA Based Soft Processors. | Jingzhao Ou, Viktor K. Prasanna |
| 2005 | Modeling and FPGA Implementation of Applications Using Parameterized Process Networks with Non-Static Parameters. | Hristo Nikolov, Todor P. Stefanov, Ed F. Deprettere |
| 2005 | A BIST Approach for Testing FPGAs Using JBITS. | Mohammed Y. Niamat, Surya S. Hejeebu, Mansoor Alam |
| 2005 | Systolic Architecture for Computing the Discrete Fourier Transform on FPGAs. | J. Greg Nash |