| 2016 | A Platform-Oblivious Approach for Heterogeneous Computing: A Case Study with Monte Carlo-based Simulation for Medical Applications. | Shih-Hao Hung, Min-Yu Tsai, Bo-Yi Huang, Chia-Heng Tu |
| 2016 | Towards PVT-Tolerant Glitch-Free Operation in FPGAs. | Safeen Huda, Jason Helge Anderson |
| 2016 | Increasing the Utility of Self-Calibration Methods in High-Precision Time Measurement Systems (Abstract Only). | Matthias Hinkfoth, Ralf Salomon |
| 2016 | CASK: Open-Source Custom Architectures for Sparse Kernels. | Paul Grigoras, Pavel Burovskiy, Wayne Luk |
| 2016 | Floorplanning of Partially Reconfigurable Design on Heterogeneous FPGA (Abstract Only). | Pingakshya Goswami, Dinesh Bhatia |
| 2016 | A Scalable Heterogeneous Dataflow Architecture For Big Data Analytics Using FPGAs (Abstract Only). | Ehsan Ghasemi, Paul Chow |
| 2016 | Automatically Optimizing the Latency, Area, and Accuracy of C Programs for High-Level Synthesis. | Xitong Gao, John Wickerson, George A. Constantinides |
| 2016 | Boolean Satisfiability-Based Routing and Its Application to Xilinx UltraScale Clock Network. | Henri Fraisse, Abhishek Joshi, Dinesh Gaitonde, Alireza Kaviani |
| 2016 | Stratix™ 10 High Performance Routable Clock Networks. | Carl Ebeling, Dana How, David M. Lewis, Herman Schmit |
| 2016 | An Activity Aware Placement Approach For 3D FPGAs (Abstract Only). | Girish Deshpande, Dinesh K. Bhatia |
| 2016 | Knowledge is Power: Module-level Sensing for Runtime Optimisation (Abstact Only). | James J. Davis, Eddie Hung, Joshua M. Levine, Edward A. Stott, Peter Y. K. Cheung, George A. Constantinides |
| 2016 | FPGP: Graph Processing Framework on FPGA A Case Study of Breadth-First Search. | Guohao Dai, Yuze Chi, Yu Wang, Huazhong Yang |
| 2016 | Intel Acquires Altera: How Will the World of FPGAs be Affected? | Derek Chiou |
| 2016 | ARAPrototyper: Enabling Rapid Prototyping and Evaluation for Accelerator-Rich Architecture (Abstact Only). | Yu-Ting Chen, Jason Cong, Zhenman Fang, Peipei Zhou |
| 2016 | Reducing Memory Requirements for High-Performance and Numerically Stable Gaussian Elimination. | David Boland |
| 2016 | Evaluating the Impact of Environmental Factors on Physically Unclonable Functions (Abstract Only). | Sebastien Bellon, Claudio Favi, Miroslaw Malek, Marco Macchetti, Francesco Regazzoni |
| 2016 | Stochastic-Based Spin-Programmable Gate Array with Emerging MTJ Device Technology (Abstract Only). | Yu Bai, Mingjie Lin |
| 2016 | HyperPipelining of High-Speed Interface Logic. | Gregg Baeckler |
| 2016 | Agile Co-Design for a Reconfigurable Datacenter. | Shlomi Alkalay, Hari Angepat, Adrian M. Caulfield, Eric S. Chung, Oren Firestein, Michael Haselman, Stephen Heil, Kyle Holohan, Matt Humphrey, Tams Juhsz, Puneet Kaur, Sitaram Lanka, Daniel Lo, Todd Massengill, Kalin Ovtcharov, Michael Papamichael, Andrew Putnam, Raja Seera, Rimon Tadros, Jason Thong, Lisa Woods, Derek Chiou, Doug Burger |
| 2016 | Stochastic-Based Convolutional Networks with Reconfigurable Logic Fabric (Abstract Only). | Mohammed Alawad, Mingjie Lin |
| 2016 | High Performance Linkage Disequilibrium: FPGAs Hold the Key. | Nikolaos Alachiotis, Gabriel Weisz |
| 2016 | t-QuadPlace: Timing Driven Quadratic Placement using Quadrisection Partitioning for FPGAs (Abstact Only). | Nimish Agashiwala, Satya Prakash Upadhyay, Kia Bazargan |
| 2016 | Enhanced TERO-PUF Implementations and Characterization on FPGAs (Abstract Only). | Cdric Marchand, Lilian Bossuet, Abdelkarim Cherkaoui |
| 2015 | A Novel Method for FPGA Test Based on Partial Reconfiguration and Sorting Algorithm (Abstract Only). | Xianjian Zheng, Fan Zhang, Lei Chen, Zhiping Wen, Yuanfu Zhao, Xuewu Li |
| 2015 | FPGA Acceleration for Simultaneous Image Reconstruction and Segmentation based on the Mumford-Shah Regularization (Abstract Only). | Wentai Zhang, Li Shen, Thomas Page, Guojie Luo, Peng Li, Peter Maa, Ming Jiang, Jason Cong |