| 1997 | Performance Driven Floorplanning for FPGA Based Designs. | Jianzhong Shi, Dinesh Bhatia |
| 1997 | Is Reconfigurable Computing Commercially Viable (panel)? | Herman Schmit |
| 1997 | Architectural and Physical Design Challenges for One-Million Gate FPGAs and Beyond. | Jonathan Rose, Dwight D. Hill |
| 1997 | A CMOS Continuous-Time Field Programmable Analog Array. | C. A. Looby, Colin Lyden |
| 1997 | The Transmogrifier-2: A 1 Million Gate Rapid Prototyping System. | David M. Lewis, David R. Galloway, Marcus van Ierssel, Jonathan Rose, Paul Chow |
| 1997 | Synthesis and Floorplanning for Large Hierarchical FPGAs. | Helena Krupnova, Christian Rabedaoro, Gabriele Saucier |
| 1997 | Challenges in CAD for the One Million Gate FPGA. | Kurt Keutzer |
| 1997 | Generation of Synthetic Sequential Benchmark Circuits. | Michael D. Hutton, Jonathan Rose, Derek G. Corneil |
| 1997 | Signal Processing at 250 MHz Using High-Performance FPGA's. | Brian Von Herzen |
| 1997 | Module Generation of Complex Macros for Logic-Emulation Applications. | Wen-Jong Fang, Allen C.-H. Wu, Duan-Ping Chen |
| 1997 | Partially-Dependent Functional Decomposition with Applications in FPGA Synthesis and Mapping. | Jason Cong, Yean-Yow Hwang |
| 1997 | General Modeling and Technology-Mapping Technique for LUT-Based FPGAs. | Amit Chowdhary, John P. Hayes |
| 1997 | Laser Correcting Defects to Create Transparent Routing for Large Area FPGA's. | Glenn H. Chapman, Benoit Dufort |
| 1997 | Buffer Minimization and Time-Multiplexed I/O on Dynamically Reconfigurable FPGAs. | Douglas Chang, Malgorzata Marek-Sadowska |
| 1997 | Wormhole Run-Time Reconfiguration. | Ray Bittner, Peter M. Athanas |
| 1997 | A FPGA-Based Implementation of a Fault-Tolerant Neural Architecture for Photon Identification. | Monica Alderighi, E. L. Gummati, Vincenzo Piuri, Giacomo R. Sechi |
| 1996 | Using BDDs to Design ULMs for FPGAs. | Zeljko Zilic, Zvonko G. Vranesic |
| 1996 | Sequencing Run-Time Reconfigured Hardware with Software. | Michael J. Wirthlin, Brad L. Hutchings |
| 1996 | Universal Logic Modules for Series-Parallel Functions. | Shashidhar Thakur, D. F. Wong |
| 1996 | Evaluation of FPGA Resources for Built-In Self-Test of Programmable Logic Blocks. | Charles E. Stroud, Ping Chen, Srinivasa Konala, Miron Abramovici |
| 1996 | Combined Spectral Techniques for Boolean Matching. | Endric Schubert, Wolfgang Rosenstiel |
| 1996 | Technology Mapping of Sequential Circuits for LUT-Based FPGAs for Performance. | Peichen Pan, C. L. Liu |
| 1996 | Diagnosing Programmable Interconnect Systems for FPGAs. | Fabrizio Lombardi, David Ashen, Xiao-Tao Chen, Wei-Kang Huang |
| 1996 | Structured Design Implementation: A Strategy for Implementing Regular Datapaths on FPGAs. | Andreas Koch |
| 1996 | The EPAC Architecture: An Expert Cell Approach to Field Programmable Analog Devices. | Hans W. Klein |