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Field Programmable Logic and Applications

FPL

B

CORE rank

CORE rank (raw)

B

Fields of research

Computer Systems Engineering

Papers indexed

3,233

1994–2025

Papers per year

1994182 peak2025

FPL papers

3,233 records sourced from DBLP. Search titles, filter by year, sort by recency.

YearTitleAuthors
2002An FPGA-based Node Controller for a High Capacity WDM Optical Packet Network.Roberto Gaudino, Vito De Feo, Marcello Chiaberge, Claudio Sanso
2002Automating Customisation of Floating-Point Designs.Altaf Abdul Gaffar, Wayne Luk, Peter Y. K. Cheung, Nabeel Shirazi, James Hwang
2002A Reconfigurable System-on-Chip-Based Fast EDM Process Monitor.Sebastian Friebe, Steffen Khler, Rainer G. Spallek, Henrik Juhr, Klaus Knanz
2002Implementing the Discrete Cosine Transform Using the Xilinx Virtex FPGA.Trevor W. Fox, Laurence E. Turner
2002Implementation of 3-D Adaptive LUM Smoother in Reconfigurable Hardware.Viktor Fischer, Milos Drutarovsk, Rastislav Lukac
2002SoC Based Low Cost Design of Digital Audio Broadcasting Transport Network Applications.Klaus Feske, Georg Heinrich, Berndt Fritzsche, Mark Langer
2002On Optimum Designs of Universal Switch Blocks.Hongbing Fan, Jiping Liu, Yu-Liang Wu, Chak-Chung Cheung
2002Partially Reconfigurable Cores for Xilinx Virtex.Matthias Dyer, Christian Plessl, Marco Platzner
2002FPGA QAM Demodulator Design.Chris Dick, Fred Harris
2002A Compilation Framework for a Dynamically Reconfigurable Architecture.Raphal David, Daniel Chillet, Sbastien Pillement, Olivier Sentieys
2002Integrated Iterative Approach to FPGA Placement.Martin Danek, Zdenek Muzikr
20022D and 3D Computer Graphics Algorithms under MORPHOSYS.Issam W. Damaj, Sohaib Majzoub, Hassan B. Diab
2002Flexible Routing Architecture Generation for Domain-Specific Reconfigurable Subsystems.Katherine Compton, Akshay Sharma, Shawn Phillips, Scott Hauck
2002Specialized Hardware for Deep Network Packet Filtering.Young H. Cho, Shiva Navab, William H. Mangione-Smith
2002Morphable Multipliers.Silviu M. S. A. Chiricescu, Michael A. Schuette, Robin Glinton, Herman Schmit
2002System-Level Modelling for Performance Estimation of Reconfigurable Coprocessors.Stephen Charlwood, Jonathan Mangnall, Steven F. Quigley
2002A Method for Implementing Bit-Serial Finite Impulse Response Digital Filters in FPGAs Using JBitsAlex Carreira, Trevor W. Fox, Laurence E. Turner
2002A Novel Watermarking Technique for LUT Based FPGA Designs.Dylan Carline, Paul Coulton
2002Practical Considerations in the Synthesis of High Performance Digital Filters for Implementation on FPGAs.Joan Carletta, M. D. Rayman
2002XPP-VC: A C Compiler with Temporal Partitioning for the PACT-XPP Architecture.Joo M. P. Cardoso, Markus Weinhardt
2002Efficient FPGA-based QPSK Demodulation Loops: Application to the DVB Standard.Francisco Cardells-Tormo, Javier Valls-Coquillat, Vicenc Almenar-Terre, Vicente Torres-Carot
2002High Performance Quadrature Digital Mixers for FPGAs.Francisco Cardells-Tormo, Javier Valls-Coquillat
2002FPGA and Mixed FPGA-DSP Implementations of Electrical Drive Algorithms.Franis Calmon, M. Fathallah, P. J. Viverge, Christian Gontrand, Jordi Carrabina, P. Foussier
2002A Clocking Technique with Power Savings in Virtex-Based Pipelined Designs.Oswaldo Cadenas, Graham M. Megson
2002TDR: A Distributed-Memory Parallel Routing Algorithm for FPGAs.Lucdio dos Anjos Formiga Cabral, Jlio S. Aude, Nelson Maculan
2,6762,700 of 3,233← PreviousNext →

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