| 2000 | Stream Computations Organized for Reconfigurable Execution (SCORE). | Eylon Caspi, Michael Chu, Randy Huang, Joseph Yeh, John Wawrzynek, Andr DeHon |
| 2000 | Implementation of Virtual Circuits by Means of the FIPSOC Devices. | E. Cant, Juan Manuel Moreno, Joan Cabestany, Ignacio Lacadena, Josep Maria Insenser |
| 2000 | A Rapid Prototyping Environment for Microprocessor Based System-on-Chips and Its Application to the Development of a Network Processor. | Andr Brinkmann, Dominik Langen, Ulrich Rckert |
| 2000 | Efficient Building of Word Recongnizer in FPGAs for Term-Document Matrices Construction. | Christophe Bobda, Thomas Lehmann |
| 2000 | Pre-route Assistant: A Routing Tool for Run-Time Reconfiguration. | Brandon Blodget |
| 2000 | Fast Carrier and Phase Synchronization Units for Digital Receivers Based on Re-configurable Logic. | Alfred Blaickner, O. Nagy, Herbert Grnbacher |
| 2000 | A CORDIC Arctangent FPGA Implementation for a High-Speed 3D-Camera System. | Stephen J. Bellis, William P. Marnane |
| 2000 | DReAM: A Dynamically Reconfigurable Architecture for Future Mobile Communications Applications. | Jrgen Becker, Thilo Pionteck, Manfred Glesner |
| 2000 | System Design with Genetic Algorithms. | Christine Bauer, Peter Zipf, Hans Wojtkowiak |
| 2000 | Design of a Fault Tolerant FPGA. | Thomas Bartzick, Michael Henze, Jens Kickler, Kai Woska |
| 2000 | A Threshold Logic-Based Reconfigurable Logic Element with a New Programming Technology. | Kazuo Aoyama, Hiroshi Sawada, Akira Nagoya, Kazuo Nakajima |
| 2000 | Reusable DSP Functions in FPGAs. | Jernej Andrejas, Andrej Trost |
| 2000 | A Placement Algorithm for FPGA Designs with Multiple I/O Standards. | Jason Helge Anderson, Jim Saunders, Sudip Nag, Chari Madabhushi, Rajeev Jayaraman |
| 2000 | Reconfigurable Systems: New Activities in Asia. | Hideharu Amano, Yuichiro Shibata, Masaki Uno |
| 2000 | CoMGen: Direct Mapping of Arbitrary Components into LUT-Based FPGAs. | Joerg Abke, Erich Barke |
| 1999 | A Runtime Reconfigurable Implementation of the GSAT Algorithm. | Wong Hiu Yung, Wing Seung Yuen, Kin-Hong Lee, Philip Heng Wai Leong |
| 1999 | Pipelined Multipliers and FPGA Architectures. | Mathew Wojko |
| 1999 | Memory Access Optimization and RAM Inference for Pipeline Vectorization. | Markus Weinhardt, Wayne Luk |
| 1999 | Placement Optimization Based on Global Routing Updating for System Partitioning onto Multi-FPGA Mesh Topologies. | Juan de Vicente, Juan Lanchares, Romn Hermida |
| 1999 | DYNASTY: A Temporal Floorplanning Based CAD Framework for Dynamically Reconfigurable Logic Systems. | Milan Vasilko |
| 1999 | An Alternative Solution for Reconfigurable Coprocessors Hardware and Interface Synthesis. | Mara Dolores Valds, Mara Jos Moure, Enrique Mandado, Angel Salaverra |
| 1999 | Reconfigurable Programming in the Large on Extendable Uniform Reconfigurable Computing Array's: An Integrated Approach Based on Reconfigurable Virtual Architectures. | Abdellah Touhafi, Wouter Brissinck, Erik F. Dirkx |
| 1999 | Logic Circuit Speeding up through Multiplexing. | Valeri F. Tomashau |
| 1999 | An On-Line Arithmetic Based FPGA for Low-Power Custom Computing. | Arnaud Tisserand, Pierre Marchal, Christian Piguet |
| 1999 | High Bandwidth Dynamically Reconfigurable Architectures Using Optical Interconnects. | Keith J. Symington, John F. Snowdon, Heiko Schroeder |